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9DBL411AGLFT

P1-P3P4-P6P7-P9
IDT
®
Four Output Differential Buffer for PCI Express 1250C—06/28/12
Advance Information
ICS9DBL411A
Four Output Differential Buffer for PCI Express
4
MLF Pin Description
PIN #
(MLF)
PIN NAME PIN TYPE DESCRIPTION
1 VDDA PWR 3.3V Power for the Analog Core
2 GNDA GND Ground for the Analog Core
3OE3# IN
Output Enable for DIF3 output. Control is as follows:
0 = enabled, 1 = Low-Low
4DIF3C_LPR OUT
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to
GND needed)
5 DIF3T_LPR OUT
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND
needed)
6 VDD_IO PWR Power supply for low power differential outputs, nominal 1.05V to 3.3V
7 GND GND Ground pin
8DIF2C_LPR OUT
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to
GND needed)
9 DIF2T_LPR OUT
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND
needed)
10 OE2# IN
Output Enable for DIF2 output. Control is as follows:
0 = enabled, 1 = Low-Low
11 DIF1C_LPR OUT
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to
GND needed)
12 DIF1T_LPR OUT
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND
needed)
13 OE1# IN
Output Enable for DIF1 output. Control is as follows:
0 = enabled, 1 = Low-Low
14 GND GND Ground pin
15 VDD_IO PWR Power supply for low power differential outputs, nominal 1.05V to 3.3V
16 DIF0C_LPR OUT
Complement clock of low power differential clock pair. (no 50ohm shunt resistor to
GND needed)
17 DIF0T_LPR OUT
True clock of low power differential clock pair. (no 50ohm shunt resistor to GND
needed)
18 OE0# IN
Output Enable for DIF0 output. Control is as follows:
0 = enabled, 1 = Low-Low
19 DIF_INC IN Complement side of differential input clock
20 DIF_INT IN True side of differential input clock
IDT
®
Four Output Differential Buffer for PCI Express 1250C—06/28/12
Advance Information
ICS9DBL411A
Four Output Differential Buffer for PCI Express
5
Absolute Maximum Ratings
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS Notes
Maximum Supply Voltage VDDA Core Supply Voltage 4.6 V 1,7
Maximum Supply Voltage VDD_IO Low-Voltage Differential I/O Supply 0.99 3.8 V 1,7
Maximum Input Voltage V
IH
3.3V LVCMOS Inputs 4.6 V 1,7,8
Minimum Input Voltage V
IL
Any Input Vss - 0.5 V 1,7
Storage Temperature Ts - -65 150
°
C1,7
Input ESD protection ESD prot Human Body Model 2000 V 1,7
Electrical Characteristics - Input/Supply/Common Output Parameters
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS Notes
Ambient Operating Temp Tambient - 0 70 °C 1
Supply Voltage VDDxxx Supply Voltage 3.135 3.465 V 1
Supply Voltage VDDxxx_IO Low-Voltage Differential I/O Supply 0.99 3.465 V 1
Input High Voltage V
IHSE
Single-ended inputs 2 V
DD
+ 0.3 V 1
Input Low Voltage V
ILSE
Single-ended inputs V
SS
- 0.3 0.8 V 1
Differential Input High Voltage V
IHDIF
Differential inputs
(single-ended measurement)
600 1.15 V 1
Differential Input Low Voltage V
ILDIF
Differential inputs
(single-ended measurement)
V
SS
- 0.3 300 mV 1
Input Slew Rate - DIF_IN dv/dt Measured differentially 0.4 8 V/ns 2
Input Leakage Current I
IN
V
IN
= V
DD ,
V
IN
=
GND -5 5 uA 1
I
DD_3.3V
3.3V supply 25 mA 1
I
DD_IO+100M
VDD_IO supply @ fOP = 100MHz 15 mA 1
I
DD_IO_400M
VDD_IO supply @ fOP = 400MHz 54 mA 1
I
DD_SB33
3.3V supply, Input stopped, OE#
pins all high
1
mA 1
I
DD_SBI
O
VDD_IO supply, Input stopped 0.1 mA 1
Input Frequency F
i
V
DD
= 3.3 V 33 400 MHz 2
Pin Inductance
L
pin
7nH 1
C
IN
Logic Inputs 1.5 5 pF 1
C
OUT
Output pin capacitance 6 pF 1
OE# latency T
OE#LAT
Number of clocks to enable or
disable output from
assertion/deassertion of OE#
13periods1
Tdrive_OE# T
DROE#
Output enable after
OE# de-assertion
10 ns 1
Tfall_OE# T
FALL
5ns 1
Trise_OE# T
RISE
5ns 1
Operating Supply Current
Standby Current
Fall/rise time of OE# inputs
Input Capacitance
IDT
®
Four Output Differential Buffer for PCI Express 1250C—06/28/12
Advance Information
ICS9DBL411A
Four Output Differential Buffer for PCI Express
6
AC Electrical Characteristics - DIF Low Power Differential Outputs
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS NOTES
Rising Edge Slew Rate t
SLR
Differential Measurement 1 2.5 V/ns 1,2
Falling Edge Slew Rate t
FLR
Differential Measurement 1 2.5 V/ns 1,2
Slew Rate Variation t
SLVAR
Single-ended Measurement 20 % 1
Maximum Output Voltage V
HIGH
Includes overshoot 1150 mV 1
Minimum Output Voltage V
LOW
Includes undershoot -300 mV 1
Differential Voltage Swing V
SWING
Differential Measurement 1200 mV 1
Crossing Point Voltage V
XABS
Single-ended Measurement 300 550 mV 1,3,4
Crossing Point Variation V
XABSVAR
Single-ended Measurement 140 mV 1,3,5
D
CYCDIS0
Differential Measurement,
fIN<=100MHz
0.5 % 1,6
D
CYCDIS1
Differential Measurement
100MHz < fIN<=267MHz
+5 % 1,6
D
CYCDIS2
Differential Measurement,
fIN>267MHz
+7 % 1,6
DIF Jitter - Cycle to Cycle DIFJ
C2C
Differential Measurement,
Additive
25 ps 1
DIF[3:0] Skew DIF
SKEW
Differential Measurement 50 ps 1
Propagation Delay t
PD
Input to output Delay 2.5 3.5 ns 1
PCIe Gen2 Phase Jitter -
Addtive
t
phase_addHI
1.5MHz < fIN < Nyquist (50MHz) 0.8 ps rms 1
PCIe Gen2 Phase Jitter -
Addtive
t
phase_addLO
10KHz < fIN < 1.5MHz 0.1 ps rms 1
Notes on Electrical Characteristics:
1
Guaranteed by design and characterization, not 100% tested in production.
2
Slew rate measured through Vswing centered around differential zero
3
Vxabs is defined as the voltage where CLK = CLK#
4
Only applies to the differential rising edge (CLK rising and CLK# falling)
8
Maximum input voltage is not to exceed maximum VDD
6
Tthis is the figure refers to the maximum distortion of the input wave form.
5
Defined as the total variation of all crossing voltages of CLK rising and CLK# falling. Matching applies to rising edge rate of CLK and
falling edge of CLK#. It is measured using a +/-75mV window centered on the average cross point where CLK meets CLK#.
7
Operation under these conditions is neither implied, nor guaranteed.
Duty Cycle Distortion
P1-P3P4-P6P7-P9

9DBL411AGLFT

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Buy 9DBL411AGLFT
Manufacturer:
IDT
Description:
Clock Buffer 4 OUTPUT PCIE BUFFER LOW POWER
Lifecycle:
New from this manufacturer.
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