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74VHC08BQ-Q100X

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
74VHC_VHCT08_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 December 2013 6 of 15
NXP Semiconductors 74VHC08-Q100; 74VHCT08-Q100
Quad 2-input AND gate
10. Dynamic characteristics
For type 74VHCT08-Q100
V
IH
HIGH-level
input voltage
V
CC
= 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V
V
IL
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
I
O
= 50 A 4.4 4.5 - 4.4 - 4.4 - V
I
O
= 8.0 mA 3.94 - - 3.8 - 3.7 - V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
I
O
= 50 A - 0 0.1 - 0.1 - 0.1 V
I
O
= 8.0 mA - - 0.36 - 0.44 - 0.55 V
I
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
- - 0.1 - 1.0 - 2.0 A
I
CC
supply current V
I
=V
CC
or GND; I
O
= 0 A;
V
CC
=5.5V
--2.0- 20 - 40A
I
CC
additional
supply current
per input pin;
V
I
=V
CC
2.1 V; I
O
=0 A;
other pins at V
CC
or GND;
V
CC
= 4.5 V to 5.5 V
--1.35- 1.5 - 1.5mA
C
I
input
capacitance
- 3.0 10 - 10 - 10 pF
Table 6. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
Table 7. Dynamic characteristics
GND = 0 V; For test circuit, see Figure 7
.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max Min Max
For type 74VHC08-Q100
t
pd
propagation
delay
nA, nB to nY; see Figure 6
[2]
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF - 4.0 8.8 1.0 10.5 1.0 11.0 ns
C
L
= 50 pF - 5.6 12.3 1.0 14 1.0 15.5 ns
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 3.0 5.9 1.0 7.0 1.0 7.5 ns
C
L
= 50 pF 4.2 7.9 1.0 9.0 1.0 10.0 ns
C
PD
power
dissipation
capacitance
C
L
=50pF; f
i
= 1 MHz;
V
I
=GNDtoV
CC
[3]
- 10.0 - - - - - pF
74VHC_VHCT08_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 December 2013 7 of 15
NXP Semiconductors 74VHC08-Q100; 74VHCT08-Q100
Quad 2-input AND gate
[1] Typical values are measured at nominal supply voltage (V
CC
= 3.3 V and V
CC
= 5.0 V).
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz, f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in Volts
N = number of inputs switching
(C
L
V
CC
2
f
o
) = sum of the outputs.
11. Waveforms
For type 74VHCT08-Q100
t
pd
propagation
delay
nA, nB to nY; see Figure 6
[2]
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 3.2 6.9 1.0 8.0 1.0 9.0 ns
C
L
= 50 pF - 4.2 7.9 1.0 9.0 1.0 10.0 ns
C
PD
power
dissipation
capacitance
C
L
=50pF; f
i
= 1 MHz;
V
I
=GNDtoV
CC
[3]
- 12.0 - - - - - pF
Table 7. Dynamic characteristics
…continued
GND = 0 V; For test circuit, see Figure 7.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max Min Max
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 6. The input (nA, nB) to output (nY) propagation delays
mna224
nA, nB input
nY output
t
PLH
t
PHL
GND
V
I
V
M
V
M
V
OH
V
OL
Table 8. Measurement points
Type Input Output
V
M
V
M
74VHC08-Q100 0.5V
CC
0.5V
CC
74VHCT08-Q100 1.5 V 0.5V
CC
74VHC_VHCT08_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 December 2013 8 of 15
NXP Semiconductors 74VHC08-Q100; 74VHCT08-Q100
Quad 2-input AND gate
Test data is given in Table 9.
Definitions test circuit:
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= Load capacitance including jig and probe capacitance.
R
L
= Load resistance.
S1 = Test selection switch.
Fig 7. Load circuit for switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aad983
DUT
V
CC
V
CC
V
I
V
O
R
T
R
L
S1
C
L
open
G
Table 9. Test data
Type Input Load S1 position
V
I
t
r
, t
f
C
L
R
L
t
PHL
, t
PLH
t
PZH
, t
PHZ
t
PZL
, t
PLZ
74VHC08-Q100 V
CC
3.0 ns 15 pF, 50 pF 1 k open GND V
CC
74VHCT08-Q100 3.0 V 3.0 ns 15 pF, 50 pF 1 k open GND V
CC
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

74VHC08BQ-Q100X

Mfr. #:
Buy 74VHC08BQ-Q100X
Manufacturer:
Nexperia
Description:
Logic Gates Quad 2-input AND gate
Lifecycle:
New from this manufacturer.
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