© 2001 Fairchild Semiconductor Corporation DS500683 www.fairchildsemi.com
October 2001
Revised October 2001
74ALVC16501 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs
74ALVC16501
Low Voltage 18-Bit Universal Bus Transceivers
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16501 is an 18-bit universal bus transceiver
which combines D-type latches and D-type flip-flops to
allow data flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA
), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the
device operates in the transparent mode when LEAB is
HIGH. When LEAB is LOW, the A data is latched if CLKAB
is held at a HIGH or LOW logic level. If LEAB is LOW, the A
bus data is stored in the latch/flip-flop on the LOW-to-HIGH
transition of CLKAB. When OEAB is HIGH, the outputs are
active. When OEAB is LOW, the outputs are in a high-
impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA
, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active HIGH and OEBA
is active
LOW).
The ALVC16501 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The ALVC16501 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
■ 1.65V–3.6V V
CC
supply operation
■ 3.6V tolerant inputs and outputs
■ t
PD
(A to B, B to A)
3.4 ns max for 3.0V to 3.6V V
CC
4.0 ns max for 2.3V to 2.7V V
CC
7.0 ns max for 1.65V to 1.95V V
CC
■ Power-down high impedance inputs and outputs
■ Supports live insertion/withdrawal (Note 1)
■ Uses patented noise/EMI reduction circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
Human body model
> 2000V
Machine model
>200V
Note 1: To ensure the high-impedance state during power up or power
down, OEBA
should be tied to V
CC
through a pull-up resistor and OEAB
should be tied to GND through a pull-down resistor; the minimum value of
the resistors is determined by the current-sourcing capability of the driver.
Ordering Code:
Devices also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number Package Number Package Description
74ALVC16501MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
