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MAX8869EUE25+

P1-P3P4-P6P7-P9P10-P11
MAX8869
1A, Microcap, Low-Dropout,
Linear Regulator
7
Maxim Integrated
Output Voltage Selection
The MAX8869 features Dual Mode operation. Connect
SET to GND (Figure 2) for preset voltage mode (see
Ordering Information
). In adjustable mode, set the out-
put between +0.8V to +5.0V through two external resis-
tors connected as a voltage-divider to SET (Figure 3).
The output voltage is set by the following equation:
V
OUT
= V
SET
(1 + R1 / R2)
where V
SET
= +0.8V. To simplify resistor selection:
R1 = R2 (V
OUT
/ V
SET
- 1)
Since the input bias current at SET is nominally 50nA,
large resistance values can be used for R1 and R2 to
minimize power consumption without losing efficiency.
Up to 80kΩ is acceptable for R2.
In preset voltage mode, the impedance between SET
and ground should be less than 10kΩ. Otherwise, spu-
rious conditions could cause the voltage at SET to
exceed the 80mV Dual Mode threshold.
Shutdown
A logic low on SHDN disables the MAX8869. In shut-
down, the pass transistor, control circuitry, reference,
and all biases are turned off, reducing supply current to
typically 0.1µA. Connect SHDN to IN for normal opera-
tion. In shutdown, RST is low and the soft-start capaci-
tor is discharged.
RST
Comparator
The MAX8869 features a low V
OUT
indicator that
asserts when the output voltage falls out of regulation.
The open-drain RST goes low when OUT falls 8%
Figure 1. Functional Diagram
Figure 2. Typical Operating Circuit with Preset Output Voltage
MOSFET DRIVER
WITH FOLDBACK
CURRENT LIMIT
SHUTDOWN
LOGIC
0.8V
REFERENCE
SS
GND
SHDN
IN
OUT
RST
SET
V
SS
6µA
736mV
THERMAL
SENSOR
OUT
DELAY TIMER
IN
3ms
SHUTDOWN
ERROR AMP
DUAL MODE
COMPARATOR
80mV
92% V
OUT
DETECTOR
V
SS
PMOS
NMOS
R1
R2
MAX8869
IN
IN
IN
IN
SHDN
SS
OUT
OUT
OUT
OUT
RST
SET
GND
ON
OFF
C
OUT
1µF
C
IN
1µF
C
SS
V
OUT
V
IN
RESET
OUTPUT
MAX8869
MAX8869
1A, Microcap, Low-Dropout,
Linear Regulator
8
Maxim Integrated
below its nominal output voltage. RST remains low for
3ms after OUT has returned to its nominal value. A
100kΩ pullup resistor from RST to a suitable logic sup-
ply voltage (typically OUT) provides a logic control sig-
nal. RST can be used as a power-on-reset signal to a
microcontroller (µC) or can drive an external LED for
indicating a power failure. RST is low during shutdown.
RST remains valid for an input voltage as low as 1V.
Soft-Start
As shown in Figure 4, a capacitor on SS allows a grad-
ual buildup of the MAX8869 output, reducing the initial
in-rush current peaks at startup. When SHDN is driven
low, the soft-start capacitor is discharged. When SHDN
is driven high or power is applied to the device, a con-
stant 6µA current charges the soft-start capacitor. The
resulting linear ramp voltage on SS increases the cur-
rent-limit comparator threshold, limiting the P-channel
gate drive (see
Soft-Start Capacitor Selection
). Leave
SS unconnected to disable the soft-start feature.
Current Limiting
The MAX8869 features a 4A current limit when the out-
put voltage is in regulation. When the output voltage
drops by 8% below its nominal, the current limit folds
back to 1.7A. The output can be shorted to ground for
an indefinite period of time without damaging the
device. Avoid continuous output current of more than
1A to prevent damage.
Both the in-regulation and short-circuit current limits can
be reduced from their nominal values by reducing the
voltage at the soft-start input (SS) below 1.25V. The cur-
rent limits scale proportionately with the voltage by I
LIM
= I
LIM_NOM
(V
SS
/ 1.25). Since the SS input sources a
nominal 6µA current, the current limit can be set by
tying a resistor (R
SS
) between SS and GND, so that I
LIM
= I
LIM_NOM
(I
SS
R
SS
/ 1.25) where I
SS
= 6µA . With
R
SS
in place, soft-start can still be achieved by placing
a capacitor (C
SS
) in parallel with R
SS
. The output current
now ramps up asymptotically to the reduced current
limit rather than the nominal one, increasing the soft-
start time. The time required for the current limit to reach
90% of its steady-state value is given by t
SS
= 2.3
R
SS
C
SS
.
Thermal Overload Protection
Thermal overload protection limits total power dissipa-
tion in the MAX8869. When the junction temperature
exceeds T
J
= +170°C, the thermal sensor turns off the
pass transistor, allowing the IC to cool. The thermal sen-
sor turns the pass transistor on once the IC’s junction
temperature drops approximately 20°C. Continuous
short-circuit conditions will consequently result in a
pulsed output.
Thermal overload protection is designed to safeguard
the MAX8869 in the event of fault conditions. For con-
tinuous operation, do not exceed the absolute maxi-
mum junction temperature rating of T
J
= +150°C.
Operating Region and Power Dissipation
Maximum power dissipation of the MAX8869 depends
on the thermal resistance of the case and circuit board,
the temperature difference between the die junction
and ambient air, and the rate of air flow. The power dis-
sipation across the device is P = I
OUT
(V
IN
- V
OUT
). The
resulting maximum power dissipation is:
P
MAX
= [(T
J(MAX)
- T
A
) / (θ
JC
+ θ
CA
)]
where (T
J(MAX)
- T
A
) is the temperature difference
between the maximum allowed die junction (150°C)
and the surrounding air; θ
JC
(junction to case) is the
Figure 3. Typical Operating Circuit with Adjustable Output
Voltage
IN
IN
IN
IN
SHDN
SS
GND
OUT
OUT
OUT
OUT
RST
SET
ON
OFF
C
OUT
1µF
C
IN
1µF
V
OUT
V
IN
RESET
OUTPUT
MAX8869
R1
R2
Figure 4. Typical Operating Circuit with Soft-Start and Current-
Limit Reduction
IN
IN
IN
IN
SHDN
SS
OUT
OUT
OUT
OUT
RST
SET
GND
ON
OFF
C
OUT
1µF
C
IN
1µF
V
OUT
V
IN
RESET
OUTPUT
MAX8869
C
SS
R
SS
MAX8869
1A, Microcap, Low-Dropout,
Linear Regulator
9
Maxim Integrated
thermal resistance of the package chosen, and θ
CA
is
the thermal resistance from the case through the PC
board, copper traces, and other materials to the sur-
rounding air. Figure 5 shows the allowable power dissi-
pation for typical PC boards at +25°C, +50°C, and
+70°C ambient temperatures.
The MAX8869 TSSOP-EP package features an
exposed thermal pad on its underside. This pad lowers
the package’s thermal resistance by providing a direct
thermal heat path from the die to the PC board.
Additionally, GND also channels heat. Connect the
exposed thermal pad and GND to circuit ground by
using a large pad (1in
2
minimum recommended) or
multiple vias to the ground plane.
Applications Information
Capacitor Selection and
Regulator Stability
Capacitors are required at the MAX8869 input and out-
put. Connect 1µF or greater capacitors between IN and
GND (C
IN
) and OUT and GND (C
OUT
). Due to the
MAX8869’s relatively high bandwidth, use only surface-
mount ceramic capacitors that have low equivalent
series resistance (ESR) and high self-resonant frequen-
cy (SRF). Make the input and output traces at least
2.5mm wide (the width of the four parallel inputs and
outputs), and connect C
IN
and C
OUT
within 6mm of the
IC to minimize the impact of PC board trace induc-
tance. The width of the ground trace should be maxi-
mized underneath the IC to ensure a good connection
between GND and the ground side of the capacitors.
The output capacitor’s ESR and SRF can affect stability
and output noise. Use capacitors with greater than 5MHz
SRF and ESR of 60mΩ or less to ensure stability and
optimum transient response. This is particularly true in
applications with very low output voltage (<2V) and high
output current (>0.5A).
Since some capacitor dielectrics may vary over bias
voltage and temperature, consult the capacitor manu-
facturer specifications to ensure that the capacitors
meet these requirements over all voltage and tempera-
ture conditions used.
Soft-Start Capacitor Selection
A capacitor (C
SS
) connected from SS to GND causes
the MAX8869 output current to slowly rise during start-
up, reducing stress on the input supply. The rise time to
full current limit (t
SS
) is determined by:
t
SS
= 2.08
10
-4
C
SS
where C
SS
is in nF. Typical capacitor values between
10nF to 100nF, with a 5V rating, are sufficient.
Because this ramp is applied to the current-limit com-
parator, the actual time for the output voltage to ramp
up depends on the load current and output capacitor.
Leave SS open to disable soft-start.
Input-Output (Dropout) Voltage
A regulator’s minimum input-to-output voltage differen-
tial (dropout voltage) determines the lowest usable sup-
ply voltage. In battery-powered systems, this
determines the useful end-of-life battery voltage. Since
a 0.2Ω P-channel MOSFET is used as the pass device,
dropout voltage is the product of R
DS(ON
) and load
current (see
Electrical Characteristics
and Dropout
Voltage vs. Output Current in
Typical Operating
Characteristics
). The MAX8869 operating current
remains low in dropout.
Noise, PSRR, and Transient Response
The MAX8869 is designed to achieve low dropout volt-
age and low quiescent current in battery-powered sys-
tems while still maintaining good noise, transient
response, and AC rejection (see PSRR vs. Frequency
in the
Typical Operating Characteristics)
. When operat-
ing from very noisy sources, supply noise rejection and
transient response can be improved by increasing the
values of the input and output capacitors and employ-
ing passive postfiltering. MAX8869 output noise is typi-
cally 150µV
RMS.
(see the Output Noise plot in the
Typical Operating Characteristics)
.
Figure 5. Power Operating Region: Maximum Output Current
vs. Input-Output Differential Voltage
0
0.6
0.4
0.2
0.8
1.0
1.2
103245
INPUT-OUTPUT DIFFERENTIAL VOLTAGE
MAXIMUM OUTPUT CURRENT (A)
MAXIMUM CONTINUOUS CURRENT
TYPICAL SUPPLY VOLTAGE LIMIT
T
A
= +70°C
T
A
= +50°C
T
A
= +25°C
T
J
= +150°C
TYPICAL DROPOUT
VOLTAGE LIMIT
P1-P3P4-P6P7-P9P10-P11

MAX8869EUE25+

Mfr. #:
Buy MAX8869EUE25+
Manufacturer:
Maxim Integrated
Description:
LDO Voltage Regulators 1A MicroCap Linear Regulator
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