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CUI Inc │ SERIES: VYB15W-T │ DESCRIPTION: DC-DC CONVERTER date 08/29/2012 │ page 5 of 6
1. Requirement on Output Load
In order to ensure the product operates effi ciently and reliably, make sure the specifi ed range of input voltage is not exceeded and the
minimum output load is not less than 10% load. If the actual load is less than the specifi ed minimum load, the output ripple may
increase sharply while its effi ciency and reliability will reduce greatly. If the actual output power is very small, please add an
appropriate resistor as extra loading.
2. Recommended Circuit
The VYB15W series has been tested according to the following recommended testing circuit. This series should be tested under load.
(see Figure 1)
If you want to further decrease the input/output ripple, you can increase capacitance properly or choose capacitors with low ESR. If
the capacitance is too big, a startup problem might arise. The maximum allowable capacitance to ensure safe and reliable operation is
listed in Table 1.
Vin
GND
+V o
0V
Cin
Cout
DC DC
-Vo
Cout
Single Output Dual Output
Vin
GND
+V o
0V
DC DC
Cin
Cout
Single Vout
(Vdc)
Cout
(μF)
Cin
(μF)
Dual Vout
(Vdc)
Cout
(μF)
Cin
(μF)
3.3 470 100 -- -- 100
5 470 100 ±5 ±220 100
12 220 100 ±12 ±100 100
15 220 100 ±15 ±100 100
Table 1
Figure 1
APPLICATION NOTES
Application circuit for TRIM (Part in broken line is the interior of models)
0V
R2
R1
R3
Vre f
RT
Trim
+V
0V
R2
R1
R3
Vre f
RT
Trim
+V
Trimup
Trimdown
Formula for trim resistance
up:
a=
Vre
Vo’-Vref
R
1
R=
a
2
R-a
2
-R
3
down:
a=
Vre
Vo’-Vref
R
2
R=
T
aR
1
R-a
1
-R
3
Note: Value for R1, R2, R3, and Vref refer to the following table.
R
T
: Trim resistance
a: User-defined parameter, no actual meaning.
Vo’: Trim up/down voltage.
Vo
Resistance
3.3 (Vdc) 5 (Vdc) 12 (Vdc) 15 (Vdc)
R1 (KΩ) 4.801 2.883 10.971 14.49 7
R2 (KΩ) 2.863 2.864 2.864 2.864
R3 (KΩ) 15 10 17.8 17.8
Vref (V) 1.24 2.5 2.5 2.5
3. Trim Application And Trim Resistance (Single Output Models)
For more information, please visit the product page.
