IRF2804/S/L
2 www.irf.com
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by T
Jmax
, starting T
J
= 25°C,
L=0.24mH, R
G
= 25Ω, I
AS
= 75A, V
GS
=10V.
Part not recommended for use above this value.
I
SD
≤ 75A, di/dt ≤ 220A/µs, V
DD
≤ V
(BR)DSS
,
T
J
≤ 175°C.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
C
oss
eff. is a fixed capacitance that gives the same
charging time as C
oss
while V
DS
is rising from 0 to 80%
V
DSS
.
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is applied to D
2
Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
Max R
DS(on)
for D
2
Pak and TO-262 (SMD) devices.
S
D
G
S
D
G
Static @ T
J
= 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage 40 ––– ––– V
∆Β
V
DSS
∆
T
J
Breakdown Voltage Temp. Coefficient ––– 0.031 ––– V/°C
R
DS(on)
SMD
Static Drain-to-Source On-Resistance ––– 1.5 2.0
mΩ
R
DS(on)
TO-220
Static Drain-to-Source On-Resistance ––– 1.8 2.3
V
GS(th)
Gate Threshold Voltage 2.0 ––– 4.0 V
gfs Forward Transconductance 130 ––– ––– S
I
DSS
Drain-to-Source Leakage Current ––– ––– 20 µA
––– ––– 250
I
GSS
Gate-to-Source Forward Leakage ––– ––– 200 nA
Gate-to-Source Reverse Leakage ––– ––– -200
Q
g
Total Gate Charge ––– 160 240 nC
Q
gs
Gate-to-Source Charge ––– 41 62
Q
gd
Gate-to-Drain ("Miller") Charge ––– 66 99
t
d(on)
Turn-On Delay Time ––– 13 ––– ns
t
r
Rise Time ––– 120 –––
t
d(off)
Turn-Off Delay Time ––– 130 –––
t
f
Fall Time ––– 130 –––
L
D
Internal Drain Inductance ––– 4.5 ––– nH Between lead,
6mm (0.25in.)
L
S
Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
C
iss
Input Capacitance ––– 6450 ––– pF
C
oss
Output Capacitance ––– 1690 –––
C
rss
Reverse Transfer Capacitance ––– 840 –––
C
oss
Output Capacitance ––– 5350 –––
C
oss
Output Capacitance ––– 1520 –––
C
oss
eff.
Effective Output Capacitance ––– 2210 –––
Diode Characteristics
Parameter Min. Typ. Max. Units
I
S
Continuous Source Current ––– ––– 280
(Body Diode) A
I
SM
Pulsed Source Current ––– ––– 1080
(Body Diode)
V
SD
Diode Forward Voltage
––– ––– 1.3 V
t
rr
Reverse Recovery Time
–––5684ns
Q
rr
Reverse Recovery Charge ––– 67 100 nC
t
on
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
V
DS
= 32V
V
GS
= 10V
Conditions
V
GS
= 0V, I
D
= 250µA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 75A
V
GS
= 10V, I
D
= 75A
T
J
= 25°C, I
F
= 75A, V
DD
= 20V
di/dt = 100A/
s
T
J
= 25°C, I
S
= 75A, V
GS
= 0V
showing the
integral reverse
p-n junction diode.
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 10V
MOSFET symbol
V
GS
= 0V
V
DS
= 25V
V
GS
= 0V, V
DS
= 32V, ƒ = 1.0MHz
Conditions
V
GS
= 0V, V
DS
= 0V to 32V
ƒ = 1.0MHz, See Fig. 5
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 40V, V
GS
= 0V
V
DS
= 40V, V
GS
= 0V, T
J
= 125°C
R
G
= 2.5
Ω
I
D
= 75A
V
DS
= 10V, I
D
= 75A
V
DD
= 20V
I
D
= 75A
V
GS
= 20V
V
GS
= -20V
