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TMS-107-01-S-D

P1-P3P4-P5
Building an EZ-Host/OTG Project From Start to Finish
4
Source Code
BAL.c
#include "cy7c67200_300.h"
typedef unsigned short uint16;
#define WRITE_REGISTER(address, value) (*(volatile uint16 *) (address)) = ( (uint16) (value) )
#define READ_REGISTER(address) (*(volatile uint16 *) (address))
#define INPLACE_OR(address, value) __asm( "or [%0], %1" : : "p" ((address)), "g" ((value)) )
#define INPLACE_AND(address, value) __asm( "and [%0], %1" : : "p" ((address)), "g" ((value)) )
void writeCPLDADX(uint16 address)
{
INPLACE_AND(GPIO1_OUT_DATA_REG, ~0x0008); /* A0 = 0 */
INPLACE_AND(GPIO1_OUT_DATA_REG, ~0x0020); /* nCS = 0 */
INPLACE_AND(GPIO1_OUT_DATA_REG, ~0x0040); /* nWR = 0 */
INPLACE_OR(GPIO0_DIR_REG, 0x00FF); /*Write Address*/
WRITE_REGISTER(GPIO0_OUT_DATA_REG, address);
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0040); /* nWR = 1 */
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0020); /* nCS = 1 */
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0008); /* A0 = 1 */
}
void writeCPLDDATA(uint16 data)
{
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0008); /* A0 = 1 */
INPLACE_AND(GPIO1_OUT_DATA_REG,~0x0020); /* nCS = 0 */
INPLACE_AND(GPIO1_OUT_DATA_REG, ~0x0040); /* nWR = 0 */
INPLACE_OR(GPIO0_DIR_REG, 0x00FF); /*Write Address*/
WRITE_REGISTER(GPIO0_OUT_DATA_REG, data);
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0040); /* nWR = 1 */
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0020); /* nCS = 1 */
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0008); /* A0 = 1 */
}
int readCPLDDATA()
{
uint16 data;
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0008); /* A0 = 1 */
INPLACE_AND(GPIO1_OUT_DATA_REG, ~0x0020); /* nCS = 0 */
INPLACE_AND(GPIO1_OUT_DATA_REG, ~0x0080); /* nRD = 0 */
INPLACE_AND(GPIO0_DIR_REG, 0xFF00); /*Write Address*/
data = (READ_REGISTER(GPIO0_IN_DATA_REG) & 0x00FF);
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0080); /* nWR = 1 */
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x0020); /* nCS = 1 */
return data;
}
void writeCPLD(int address, int data)
{
writeCPLDADX(address);
writeCPLDDATA(data);
}
int readCPLD(int address)
{
writeCPLDADX(address);
return readCPLDDATA();
}
int main()
{
uint16 button_read = 0;
INPLACE_AND(UART_CTL_REG, 0xFE); /* Disable UART to free up GPIO 6 & 7 on EZ-OTG for CPLD*/
INPLACE_OR(GPIO0_OUT_DATA_REG, 0x00FF); /* Data Port */
INPLACE_OR(GPIO1_OUT_DATA_REG, 0x00E8); /* A0 = nCS = nRD = nWR = 1 */
INPLACE_OR(GPIO0_DIR_REG, 0x00FF);
INPLACE_OR(GPIO1_DIR_REG, 0x00FF);
Building an EZ-Host/OTG Project From Start to Finish
© Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
while(1) {
button_read = readCPLD(0x0000); /* Read Buttons */
if((button_read & 0x01) == 0) { /* If Button S1 (PB_UP) is pressed, turn LEDs OFF */
writeCPLD(0x7, 0xFF);
writeCPLD(0x1, 0xFF); /* Clear Button S1 Status */
}
if((button_read & 0x08) == 0) { /* If Button S5 (PB_DN) is pressed, turn LEDs ON */
writeCPLD(0x7, 0x00);
writeCPLD(0x4, 0xFF); /* Clear Button S5 Status */
}
}
}
}
All product and company names mentioned in this document are the trademarks of their respective holders.
Approved AN048 8/20/03 kkv
StartupNoBIOS.c
; File: startup.s
; Declare the main function.
.global main
.section .text
.global _start
_start:
; Jump to the main function.
jmp main
; End of file: startup.s
StartupWithBIOS.c
; File: startup.s
; Declare the main function.
.global main
.section .text
.global _start
_start:
; Jump the main function.
; jmp main
; Replace TMR0 ISR with tmr0_isr
mov [0], tmr0_isr
; Enable TMR0 INT
or [0xC00e], 0x0001
; Replace IDLER ISR with main.Now BIOS IDLE chain is only called in TMR0 ISR.
mov [(71*2)],main
ret
; int 70 enables the IDLE_INT. This allows bios to execute periodically
; since main never returns. Now we can use debug USB port and UART.
tmr0_isr: ; TMR0 ISR, now calls BIOS IDLE
push [0xc000] ; Push Flags Register
int 73 ; PUSHALL_INT
int 70 ; IDLE_INT (will check UART and USB for Scan signitures)
int 74 ; POPALL_INT
mov [0xc010], 10000 ; Load TMR0 so that it will expire every 10ms
pop [0xc000] ; Pop Flags Register
sti
ret
; End of file: startup.s
P1-P3P4-P5

TMS-107-01-S-D

Mfr. #:
Buy TMS-107-01-S-D
Manufacturer:
Samtec
Description:
Headers & Wire Housings .050" x .100" Micro Terminal Strip
Lifecycle:
New from this manufacturer.
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