LTC2924
13
2924fc
For more information www.linear.com/LTC2924
Cascading Multiple LTC2924s
Two or more LTC2924s may be cascaded to fully se quence
8,12 or more power supplies. Figures 7 and 8 show how
to configure the LTC2924 to sequence 8 and 12 power
supplies. To sequence more power supplies, use the circuit
in Figure 8 and add more LTC2924s in the middle.
Notice that the last LTC2924 in the cascade string must
have a pull-up resistor on the DONE pin. Any LTC2924
that is not the first in the cascade string should have the
hysteresis current setting resistor, R
HYS
, pulled to V
CC
instead of ground. The value of the R
HYS
resistor remains
unchanged. The FAULT pins should all be connected to-
gether and pulled up with a single 10k resistor.
Care should be taken when designing a cir
cuit cascading
multiple LTC2924s. Use the following guidelines:
Figure 8. Cascading Three LTC2924s to Fully Sequence Up to 12 Power Supplies
All V
CC
and ground pins for the LTC2924s in the cascade
chain must be connected to the same power supply.
The ground pins should be connected via a ground
plane.
Cascaded LTC2924s communicate using a combination
of levels and pulses which do not look like the normal
output of a DONE pin nor input to an ON pin. Do not
connect any other components to the node between
the DONE and ON pins. Keep the parasitic capacitance
on this node below 75pF. Care should be taken when
routing a circuit trace between DONE and ON. If pos
-
sible, run the trace adjacent to the ground plane, and/
or shield
the trace with a ground trace on either side.
Leakage currents must be maintained below 2µA on
this node.
applicaTions inForMaTion
Figure 7. Cascading Two LTC2924s to Fully Sequence Up to Eight Power Supplies
TMR
HYS/CFG
ON
IN1
IN2
IN3
IN4
V
CC
GND
PGT
OUT1
OUT2
OUT3
OUT4
DONE
LTC2924
V
CC
FAULT
V
CC
V
CC
DONE
10k
10k
FAULT
2924 F07
TMR
HYS/CFG
ON
IN1
IN2
IN3
IN4
V
CC
GND
PGT
OUT1
OUT2
OUT3
OUT4
DONE
LTC2924ON
R
HYS
R
HYS
FAULT
TMR
HYS/CFG
ON
IN1
IN2
IN3
IN4
V
CC
GND
PGT
OUT1
OUT2
OUT3
OUT4
DONE
LTC2924
V
CC
FAULT
V
CC
V
CC
DONE
10k
10k
FAULT
2924 F08
TMR
HYS/CFG
ON
IN1
IN2
IN3
IN4
V
CC
GND
PGT
OUT1
OUT2
OUT3
OUT4
DONE
LTC2924
R
HYS
R
HYS
FAULT
TMR
HYS/CFG
ON
IN1
IN2
IN3
IN4
V
CC
GND
PGT
OUT1
OUT2
OUT3
OUT4
DONE
LTC2924ON
R
HYS
FAULT
LTC2924
14
2924fc
For more information www.linear.com/LTC2924
Connecting Unused OUT and IN Pins
Figure 9 shows how to connect unused OUT and IN pins
on the LTC2924. Unused OUT-IN pairs must be connected
together to ensure proper operation.
Fault Detection
The LTC2924 has sophisticated fault detection which can
detect:
Power On and Power Off sequence errors
System controller command errors
Power On timeout failure (with the power good timer
enabled)
Externally commanded faults (FAULT pin pulled low)
If any of the above faults are detected, the LTC2924
immediately pulls the OUT1-OUT4 pins low turning off
all of the power supplies. If the fault condition is detected
in one of the supplies controlled by the
LTC2924 (an “in
-
ternally generated fault), the FAULT pin is immediately
pulled low indicating the fault condition.
Clearing the Fault Condition
In order to clear the fault condition within the LTC2924,
the following conditions must exist:
All four IN pins must be below 0.61V
The ON pin must be below 0.61V
In the case of an externally generated fault, the FAULT
pin must not be pulled down.
Fault Condition Indicator
If the LTC2924 receives a commanded fault (a cascaded
LTC2924 or an external source pulls down on the FAULT
pin) the LTC2924 will pull the TMR pin low. If the LTC2924
has detected the fault itself (from its internal fault detec-
tion circuits) it will indicate so by raising the TMR pin to
V
CC
. This internal/external fault indicator can be especially
helpful while searching for the source of a fault condition
when multiple LTC2924s are cascaded.
If a fault occurs when the ON pin is high, the fault status
indication on the TMR pin will remain valid until the ON
pin goes low.
Figure 9. Connecting Unused OUT and IN Pins
applicaTions inForMaTion
IN1
IN2
IN3
IN4
OUT1
OUT2
OUT3
OUT4
LTC2924
2924 F09
PS2
PS1
LTC2924
15
2924fc
For more information www.linear.com/LTC2924
Note that the TMR pin may take a while to reach the V
CC
voltage. The pin is pulled to V
CC
with the same 5µA current
source used for the TMR function. The larger the timer
capacitor, the longer this will take. To estimate the amount
of time required for the TMR pin to reach V
CC
in a fault
condition, multiply the normal timer duration by V
CC
(in
Volts). See Figures 7 and 8 for FAULT pin connections
when two or more LTC2924 chips are cascaded.
Sequence Errors
The LTC2924 keeps track of power supplies that should
be on during the Power On sequence and the Power Off
sequence. The LTC2924 also monitors each IN pin after
all of the power supplies have sequenced on. If a power
supply (as monitored at the IN1-IN4 pins) goes low when
it should be high, a fault condition is detected. All four OUT
pins are pulled low and the FAULT pin will be pulled low.
The precision voltage threshold for detection of a se quence
error at any of the IN1-IN4 pins is the same as the normal
threshold (~0.61V). The precision voltage com parators
used in the LTC2924 employ a sampled tech nique to im
-
prove accuracy. The sample time is approximately 20µs.
To improve the speed of detection for a sequence error, a
second high speed comparator is used for detecting a low
power supply. The voltage threshold for the high speed
comparators is approximately 0.4V (V
ON(FAULT)
). Voltages
sensed below this threshold when a power supply should
be ON will cause a fault in ~1µs.
System Controller ON Command Errors
Once the LTC2924 receives the Power On command via
the ON pin, the ON pin must remain above 0.61V until
the Power On sequence has completed (e.g. DONE is as-
serted). Removing the ON command before the LTC2924
Power On sequence has completed is considered a fault
condition. All of the OUT1-OUT4 pins that are already high
will be pulled low and the FAULT pin will be pulled low.
The same is true for the Power Off sequence. If the
LTC2924 has completed the Power On sequence and the
ON pin goes low, the ON pin must remain below 0.61V
until the Power Off sequence has completed. Raising the
ON pin above 0.61V before the Power Off sequence has
com pleted is considered a fault condition. Any OUTn pins
that are still high will immediately be pulled low and the
FAULT pin will be pulled low.
Power On Timeout Errors
If the LTC2924 PGT is being used (not tied to ground) a
fault condition will be detected when the PGT pin goes
above ~1V. If this occurs during Power On, all of the
OUT1 -OUT4 pins that are already high will be pulled low
and the FAULT pin will be pulled low.
Externally Commanded Faults
If an external circuit pulls the FAULT pin low, an external
fault condition is detected and all OUT pins will be pulled
low. After sensing the Externally Commanded Fault, the
LTC2924 will also pull down on the FAULT pin until the
conditions for clearing the fault condition exist (see Clear-
ing the Fault Condition).
applicaTions inForMaTion

LTC2924CGN#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC Power Supply On/Off Sequencer
Lifecycle:
New from this manufacturer.
Delivery:
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