CYV15G0104EQ-LXC

CYV15G0104EQ
Multi Rate Video Cable Equalizer
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 001-07425 Rev. ** Revised October 25, 2007
Features
Multi rate adaptive equalization
Operates from 143 to 1485 Mbps serial data rate
SMPTE 292M, SMPTE 344M, and SMPTE 259M compliant
Supports DVB-ASI at 270 Mbps
Maximum cable length adjustment for HD-SDI and SD-SDI
data rates
Carrier detect and mute functionality for HD-SDI and SD-SDI
data rates
Equalizer bypass mode
Seamless connection with HOTLink II™ family
Equalizes up to 350m of Belden 1694A and Canare L-5CFB
coaxial cable at 270 Mbps
Typically equalizes up to 200m of Belden 1694A and Canare
L-5CFB coaxial cable at 1.485 Gbps
Low power: 160 mW at 3.3V
Single 3.3V supply
16-pin Quad Flat No Lead (QFN) package
0.18 μm CMOS technology
Pb-free and RoHS compliant
Pin compatible to existing QFN equalizer devices
Uses Cypress CLEANLink™ technology
Functional Description
The CYV15G0104EQ is a multi rate adaptive equalizer designed
to equalize and restore signals received over 75Ω coaxial cable.
The equalizer meets SMPTE 292M, SMPTE 344M, and SMPTE
259M data rates. The CYV15G0104EQ is optimized to equalize
up to 350m of Canare L-5CFB and Belden 1694A coaxial cable
at 270 Mbps and typically up to 200m of Canare L-5CFB and
Belden 1694A coaxial cable at 1.485 Gbps. The
CYV15G0104EQ connects seamlessly to the HOTLink II family
of transceiver devices.
The CYV15G0104EQ has DC restoration to compensate for the
DC content of the SMPTE pathological patterns. The maximum
cable length adjust (MCLADJ) sets the approximate maximum
cable length to equalize at SD and HD data rates. The
CYV15G0104EQ’s differential serial outputs (SDO, SDO
) mute,
when the approximate cable length set by MCLADJ is reached,
and carrier detect (CD) is tied to MUTE. MUTE pin controls
muting the outputs of the equalizer at HD and SD data rates.
Power consumption is typically 160 mW at 3.3V.
Serial Links
Copper Cable
CYV15G0104EQ
Multi Rate
Cable
Equalizer
Connections
Equalizer System Connection Diagram
Cable
Driver
HOTLink II
Serializer
HOTLink II
Deserializer
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CYV15G0104EQ
Document Number: 001-07425 Rev. ** Page 2 of 9
Pinouts
Figure 1. Pin Diagram - 16 Pin QFN (Top View)
CYV15G0104EQ Multi-Rate Video Cable Equalizer Block Diagram
CYV15G0104EQ Multi-Rate Video Cable Equalizer Block Diagram
Differential Output
Cable Length Analog
Adjustor and Mute
Threshold Block
Carrier Detect and
Mute Control Block
DC Restore
Equalizer
MUTE
BYPASS
SDO, SDO
SDI, SDI
MCLADJ
CD
2
3
4
5678
CYV15G0104EQ
(Marked CY21EQ
On Package)
SDO
GND
MCLADJ
BYPASS
SDI
AGC
GND
SDI
SDO
GND
AGC
GND
VCC
MUTE
VCC
CD
Center Pad
(bottom of package)
1
16 15 14 13
11
10
9
12
Equalizer Block Diagram
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CYV15G0104EQ
Document Number: 001-07425 Rev. ** Page 3 of 9
Table 1. Pin Descriptions - CYV15G0104EQ Single Channel Cable Equalizer
Name IO Characteristics Signal Description
Control Signals
MUTE LVTTL Input Mute.
When the MUTE pin is set LOW, the equalizer’s differential serial outputs are not muted.
When the MUTE pin is set HIGH, the equalizer’s differential serial outputs are muted.
BYPASS setting is ignored when MUTE is HIGH.
Connecting CD
to MUTE pin enables automatic muting of the equalizer upon loss of signal.
Do not leave unused MUTE pin floating. Always drive it to a known state.
CD LVTTL Output Carrier Detect.
When the incoming data stream is present and maximum cable length does not exceed
that set by MCLADJ, CD
outputs a voltage less than 0.8V.
When the incoming data stream is not present or maximum cable length exceeds that set
by MCLADJ, CD
outputs a voltage greater than 2.8V.
Connecting CD
to MUTE pin enables automatic muting of the equalizer upon loss of signal.
MCLADJ Analog Input Maximum Cable Length Adjust.
The maximum equalized cable length is set by the voltage applied to the MCLADJ input.
When the maximum cable length set by MCLADJ is reached, the CD
indicator is
deasserted.
If MCLADJ functionality is not needed, this pin should be left floating or tied to ground to
allow maximum equalized cable length.
MCLADJ works at both SD and HD data rates.
BYPASS LVTTL Input Equalizer Bypass. When BYPASS is set HIGH, the signal presented at the equalizer’s
differential serial inputs (SDI, SDI
) is routed to the equalizer’s differential serial outputs
(SDO, SDO
) without equalizing.
When BYPASS is set LOW, the incoming video data stream is equalized and presented
at the equalizer‘s serial differential outputs (SDO, SDO
).
When MUTE pin is set HIGH, BYPASS setting is ignored and the serial outputs are muted.
AGC, AGC Analog Automatic Gain Control. Place a capacitor of 1 μF between the AGC and AGC pins.
SDO, SDO Differential
Output
Differential Serial Outputs. The equalized serial video data stream is presented at the
SDO/SDO
differential serial CML output.
SDI, SDI Differential
Input
Differential Serial Inputs. SDI/SDI accepts either a single-ended or differential serial
video data stream over 75Ω coaxial cable.
Power
VCC Power Power Supply for Device. Connect to +3.3V DC.
GND Gnd Connect to Ground.
Center Pad Connect to PCB Ground for Maximum Thermal Dissipation.
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CYV15G0104EQ-LXC

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
Equalizers Multi-Format HD/SD Video Equalizer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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