10
FN9196.1
February 19, 2014
to the selected feedback voltage and amplifies the
difference. The MOSFET driver reads the error signal and
applies the appropriate drive to the P-Channel pass
transistor. If the feedback voltage is lower than the reference
voltage, the pass transistor gate is pulled lower, allowing
more current to pass and increasing the output voltage. If the
feedback voltage is higher than the reference voltage, the
pass transistor gate is driven higher, allowing less current to
pass to the output.
Internal P-Channel Pass Transistors
Both the LDO Regulators in ISL6455 feature a typical 0.5
r
DS(on)
P-channel MOSFET pass transistor. This provides
several advantages over similar designs using PNP bipolar
pass transistors. The P-Channel MOSFET requires no base
drive, which reduces quiescent current considerably. PNP
based regulators waste considerable current in dropout
when the pass transistor saturates. They also use high base
drive currents under large loads. The ISL6455 does not have
these drawbacks.
Integrated RESET for MAC/Baseband Processors
The ISL6455 includes a microprocessor supervisory block.
This block eliminates an extra RESET IC and external
components needed in wireless chipset applications. This
block performs a single function; it asserts a RESET
signal
whenever the VIN_PWM supply voltage decreases below a
preset threshold, and keeps it asserted for a programmable
time period set by the external capacitor CT.
UVLO Reset threshold is always lower than the RESET
threshold. This insures that as V
IN
falls, the reset goes low
before the LDOs and PWM are shut off.
Integrator Circuitry
Both ISL6455 LDO Regulators use external 33nF
compensation capacitors for minimizing load and line
regulation errors and for lowering output noise. When the
output voltage shifts due to varying load current or input
voltage, the integrator capacitor voltage is raised or lowered
to compensate for the systematic offset at the error amplifier.
Compensation is limited to ±5% to minimize transient
overshoot when the device goes out of dropout, current limit,
or thermal shutdown.
Shutdown
Driving the EN_LDO pin low will put LDO1 and LDO2 into
the shutdown mode. Driving the EN pin low will put the PWM
into shutdown mode. Pulling both the EN and EN_LDO pins
low simultaneously, puts the ISL6455, ISL6455A in a
shutdown mode, and supply current drops to 15µA typical.
Protection Features for the LDOs
Current Limit
The ISL6455 and ISL6455A monitor and control the pass
transistor’s gate voltage to limit the output current. The
current limit for both LDO1 and LDO2 is 330mA. The output
can be shorted to ground without damaging the part due to
the current limit and thermal protection features.
Thermal Overload Protection
Thermal overload protection limits total power dissipation in
the ISL6455, ISL6455A. When the junction temperature (T
J
)
exceeds +150°C, the thermal sensor sends a signal to the
shutdown logic, turning off the pass transistor and allowing
the IC to cool. The pass transistor turns on again after the
IC’s junction temperature typically cools by +20°C, resulting
in an intermittent output condition during continuous thermal
overload. Thermal overload protection protects the ISL6455,
ISL6455A against fault conditions. For continuous operation,
the absolute maximum junction temperature rating of
+150°C in not to be exceeded.
Operating Region and Power Dissipation
The maximum power dissipation of ISL6455 depends on the
thermal resistance of the IC package and circuit board, the
temperature difference between the die junction and ambient
air, and the rate of air flow. The power dissipated in the
device is:
PT = P1 + P2 + P3, where:
P1 = I
OUT1
x V
OUT1
x n, n is the efficiency of the PWM
P2 = I
OUT2
(V
IN
– V
OUT2
)
P3 = I
OUT3
(V
IN
- V
OUT3
)
The maximum power dissipation is:
P
max
= (T
jmax
– T
A
)/
JA
Where T
jmax
= +150°C, T
A
= ambient temperature, and
JA
is the thermal resistance from the junction to the surrounding
environment.
The ISL6455, ISL6455A package feature an exposed
thermal pad on its underside. This pad lowers the thermal
resistance of the package by providing a direct heat
conduction path from the die to the PC board. Additionally,
the ISL6455 and ISL6455A ground (GND_LDO and PGND)
performs the dual function of providing an electrical
connection to system ground and channeling heat away.
Connect the exposed bottom pad direct to the GND_LDO
ground plane.
Application Information
LDO Regulator Capacitor Selection and Regulator
Stability
Capacitors are required at the ISL6455, ISL6455A LDO
regulators’ input and output for stable operation over the
entire load range and the full temperature range. Use >1µF
capacitor at the input of LDO regulators, V
IN
_LDO pins. The
input capacitor lowers the source impedance of the input
supply. Larger capacitor values and lower ESR provide
better PSRR and line transient response. The input
ISL6455, ISL6455A
