SSM2306CPZ-REEL7 Datasheet SSM2306CPZ-REEL7, SSM2306CPZ-R2, SSM2306CPZ-REEL | P4-P6

Data Sheet SSM2306

Rev. A | Page 3 of 16

SPECIFICATIONS

V

DD

= 5.0 V; T

A

= 25

o

C; R

L

= 4 Ω, 8 Ω; gain = 6 dB, unless otherwise noted.

Table 1.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

DEVICE CHARACTERISTICS

Output Power P

O

R

L

= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V

DD

= 5.0 V 1.8 W

R

L

= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V

DD

= 5.0 V 1.4 W

R

L

= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V

DD

= 3.6 V 0.9 W

R

L

= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V

DD

= 3.6 V 0.615 W

R

L

= 4 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V

DD

= 2.5 V 0.35 W

R

L

= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, V

DD

= 2.5 V 0.275 W

R

L

= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V

DD

= 5.0 V 2.4 W

R

L

= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V

DD

= 5.0 V 1.53 W

R

L

= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V

DD

= 3.6 V 1.1 W

R

L

= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V

DD

= 3.6 V 0.77 W

R

L

= 4 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V

DD

= 2.5 V 0.45 W

R

L

= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, V

DD

= 2.5 V 0.35 W

Efficiency η P

OUT

= 2 W, 4 Ω, V

DD

= 5.0 V 75 %

P

OUT

= 1.4 W, 8 Ω, V

DD

= 5.0 V 85 %

Total Harmonic Distortion + Noise THD + N P

O

= 2 W into 4 Ω each channel, f = 1 kHz, V

DD

= 5.0 V 0.4 %

P

O

= 1 W into 8 Ω each channel, f = 1 kHz, V

DD

= 5.0 V 0.02 %

Input Common-Mode Voltage Range V

CM

1.0 V

DD

− 1 V

Common-Mode Rejection Ratio CMRR

GSM

V

CM

= 2.5 V ± 100 mV at 217 Hz, G = 18 dB, input

referred

70 dB

Channel Separation X

TALK

P

O

= 100 mW

, f = 1 kHz 78 dB

Average Switching Frequency f

SW

420 kHz

Differential Output Offset Voltage V

OOS

2.0 mV

POWER SUPPLY

Supply Voltage Range V

DD

Guaranteed from PSRR test 2.5 5.0 V

Power Supply Rejection Ratio PSRR V

DD

= 2.5 V to 5.0 V 70 85 dB

PSRR

GSM

V

RIPPLE

= 100 mV rms at 217 Hz, inputs ac GND,

C

IN

= 0.1 μF, input referred

75 dB

Supply Current I

SY

V

IN

= 0 V, no load, V

DD

= 5.0 V 6.5 mA

V

IN

= 0 V, no load, V

DD

= 3.6 V 5.7 mA

V

IN

= 0 V, no load, V

DD

= 2.5 V 5.1 mA

Shutdown Current I

SD

= GND

20 nA

GAIN

Closed-Loop Gain A

v

R

EXT

= 0 18 dB

Differential Input Impedance Z

IN

SD

= VDD

43 kΩ

SHUTDOWN CONTROL

Input Voltage High V

IH

I

SY

≥ 1 mA 1.2 V

Input Voltage Low V

IL

I

SY

≤ 300 nA 0.5 V

Turn-On Time t

WU

SD

rising edge from GND to V

DD

30 ms

Turn-Off Time t

SD

falling edge from V

DD

to GND

5 μs

Output Impedance O

UT

SD

= GND

>100 kΩ

NOISE PERFORMANCE

Output Voltage Noise e

n

V

DD

= 3.6 V, f = 20 Hz to 20 kHz, inputs are

ac-grounded, A

V

= 18 dB, R

L

= 4 Ω, A weighting

44 μV

Signal-to-Noise Ratio SNR P

OUT

= 2.0 W, R

L

= 4 Ω 96 dB

SSM2306 Data Sheet

Rev. A | Page 4 of 16

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings apply at 25°C, unless otherwise noted.

Table 2.

Parameter Rating

Supply Voltage 6 V

Input Voltage V

DD

Common-Mode Input Voltage V

DD

ESD Susceptibility 4 kV

Storage Temperature Range −65°C to +150°C

Operating Temperature Range −40°C to +85°C

Junction Temperature Range −65°C to +165°C

Lead Temperature (Soldering, 60 sec) 300°C

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

θ

JA

is specified for the worst-case conditions, that is, a device

soldered in a circuit board for surface-mount packages.

Table 3. Thermal Resistance

Package Type θ

JA

θ

JC

Unit

16-Lead, 3 mm × 3 mm LFCSP 44 31.5 °C/W

ESD CAUTION

Data Sheet SSM2306

Rev. A | Page 5 of 16

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

06542-002

12

11

10

1

3

49

2

6

5

7

8

16

15

14

13

NOTES

1. NIC = NO INTERNAL CONNECTION.

2

. DNC = DO NOT CONNECT.

3. CONNECT THE EXPOSED PAD TO THE GROUND PLANE OF THE PCB.

OUTL+

OUTL–

SD

INL+

OUTR+

GND

VDD

GND

OUTR–

DNC

INR+

INL–

NIC

INR–

SSM2306

TOP VIEW

(Not to Scale)

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 OUTL+ Inverting Output for Left Channel.

2 OUTL− Noninverting Output for Left Channel.

3

SD

Shutdown Input. Active low digital input.

4 INL+ Noninverting Input for Left Channel.

5 INL− Inverting Input for Left Channel.

6, 7 NIC No Internal Connection.

8 INR− Inverting Input for Right Channel.

9 INR+ Noninverting Input for Right Channel.

10 DNC Do Not Connect.

11 OUTR− Noninverting Output for Right Channel.

12 OUTR+ Inverting Output for Right Channel.

13 GND Ground for Output Amplifiers.

14 VDD Power Supply for Output Amplifiers.

15 VDD Power Supply for Output Amplifiers.

16 GND Ground for Output Amplifiers.

0 EPAD Exposed Pad. Connect the exposed pad to the ground plane of the PCB.

SSM2306CPZ-REEL7

SSM2306CPZ-REEL7

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