74ACT253SC Datasheet 74ACT253SC, 74ACT253PC, 74ACT253SCX | P1-P3

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74AC253, 74ACT253 Dual 4-Input Multiplexer with 3-STATE Outputs

April 2007

74AC253, 74ACT253 Rev. 1.5

74AC253, 74ACT253

Dual 4-Input Multiplexer with 3-STATE Outputs

Features

■

I

CC

and I

OZ

reduced by 50%

■

Multifunction capability

■

Non inverting 3-STATE outputs

■

Outputs source/sink 24mA

■

ACT253 has TTL-compatible inputs

General Description

The AC/ACT253 is a dual 4-input multiplexer with

3-STATE outputs. It can select two bits of data from four

sources using common select inputs. The outputs may

be individually switched to a high impedance state with a

HIGH on the respective Output Enable (OE

) inputs,

allowing the outputs to interface directly with bus

oriented systems.

Ordering Information

Device also available Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

Connection Diagram Pin Descriptions

Order Number Package

Number

Package Description

74AC253SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74AC253SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74AC253PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

74ACT253SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74ACT253SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74ACT253MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,

4.4mm Wide

Pin Names Description

I

0a

–I

3a

Side A Data Inputs

I

0b

–I

3b

Side B Data Inputs

S

0

, S

1

Common Select Inputs

OE

a

Side A Output Enable Input

OE

b

Side B Output Enable Input

Z

a

, Z

b

3-STATE Outputs

FACT™ is a trademark of Fairchild Semiconductor Corporation.

74AC253, 74ACT253 Dual 4-Input Multiplexer with 3-STATE Outputs

74AC253, 74ACT253 Rev. 1.5 2

Logic Diagram

IEEE/IEC

Functional Description

The AC/ACT253 contains two identical 4-input multiplex-

ers with 3-STATE outputs. They select two bits from four

sources selected by common Select inputs (S

0

, S

1

). The

4-input multiplexers have individual Output Enable (OE

a

,

OE

b

) inputs which, when HIGH, force the outputs to a

high impedance (High Z) state. This device is the logic

implementation of a 2-pole, 4-position switch, where the

position of the switch is determined by the logic levels

supplied to the two select inputs. The logic equations for

the outputs are shown:

Z

a

=

OE

a

•(I

0a

• S

1

• S

0

+ I

1a

• S

1

• S

0

+

I

2a

• S

1

• S

0

+ I

3a

• S

1

• S

0

)

Z

b

=

OE

b

•(I

0b

• S

1

• S

0

+ I

1b

• S

1

• S

0

+

I

2b

• S

1

• S

0

+ I

3b

• S

1

• S

0

)

If the outputs of 3-STATE devices are tied together, all

but one device must be in the high impedance state to

avoid high currents that would exceed the maximum

ratings. Designers should ensure that Output Enable

signals to 3-STATE devices whose outputs are tied

together are designed so that there is no overlap.

Truth Table

Address Inputs S

0

and S

1

are common to both sections.

H

=

HIGH Voltage Level

L

=

LOW Voltage Level

X

=

Immaterial

Z

=

High Impedance

Select Inputs Data Inputs Output Enable Outputs

S

0

S

1

I

0

I

1

I

2

I

3

OE Z

XXXXXX H Z

LLLXXX L L

LLHXXX L H

H LXLXX L L

HLXHXX L H

LHXXLX L L

LHXXHX L H

HHXXXL L L

HHXXXH L H

74AC253, 74ACT253 Dual 4-Input Multiplexer with 3-STATE Outputs

74AC253, 74ACT253 Rev. 1.5 3

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to

estimate propagation delays.

Figure 1.

74ACT253SC

74ACT253SC

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