LTC3566EUF#TRPBF Datasheet LTC3566EUF#PBF, LTC3566EUF-2#PBF, LTC3566EUF#TRPBF | P16-P18

LTC3566/LTC3566-2

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Table 1. CHRG Output Pin

STATUS FREQUENCY

MODULATION (BLINK)

FREQUENCY DUTY CYCLE

Charging 0Hz 0Hz (Lo-Z) 100%

Not Charging 0Hz 0Hz (Hi-Z) 0%

NTC Fault 35kHz 1.5Hz at 50% 6.25%, 93.75%

Bad Battery 35kHz 6.1Hz at 50% 12.5%, 87.5%

temperature while a microprocessor will be able to decode

either the 6.25% or 93.75% duty cycles as an NTC fault.

If a battery is found to be unresponsive to charging (i.e.,

its voltage remains below 2.85V, for 1/2 hour), the CHRG

pin gives the battery fault indication. For this fault, a human

would easily recognize the frantic 6.1Hz fast blink of the

LED while a microprocessor would be able to decode either

the 12.5% or 87.5% duty cycles as a bad battery fault.

Note that the LTC3566 family is a 3-terminal PowerPath

product where system load is always prioritized over battery

charging. Due to excessive system load, there may not be

sufﬁ cient power to charge the battery beyond the trickle

charge threshold voltage within the bad battery timeout

period. In this case, the battery charger will falsely indicate

a bad battery. System software may then reduce the load

and reset the battery charger to try again.

Although very improbable, it is possible that a duty cycle

reading could be taken at the bright-dim transition (low

duty cycle to high duty cycle). When this happens the

duty cycle reading will be precisely 50%. If the duty cycle

reading is 50%, system software should disqualify it and

take a new duty cycle reading.

NTC Thermistor

The battery temperature is measured by placing a nega-

tive temperature coefﬁ cient (NTC) thermistor close to the

battery pack.

To use this feature connect the NTC thermistor, R

NTC

, be-

tween the NTC pin and ground and a resistor, R

NOM

, from

BUS

to the NTC pin. R

NOM

should be a 1% resistor with

a value equal to the value of the chosen NTC thermistor

at 25°C (R25). A 100k thermistor is recommended since

thermistor current is not measured by the LTC3566 family

and will have to be budgeted for USB compliance.

The LTC3566 family will pause charging when the resistance

of the NTC thermistor drops to 0.54 times the value of R25

or approximately 54k. For Vishay curve 1 thermistor, this

corresponds to approximately 40°C. If the battery charger

is in constant-voltage (ﬂ oat) mode, the safety timer also

pauses until the thermistor indicates a return to a valid

temperature. As the temperature drops, the resistance

OPERATION

The signal at the CHRG pin can be easily recognized as

one of the above four states by either a human or a mi-

croprocessor. An open drain output, the CHRG pin can

drive an indicator LED through a current limiting resistor

for human interfacing or simply a pull-up resistor for

microprocessor interfacing.

To make the CHRG pin easily recognized by both humans

and microprocessors, the pin is either low for charging,

high for not charging, or it is switched at high frequency

(35kHz) to indicate the two possible faults, unresponsive

battery and battery temperature out of range.

When charging begins, CHRG is pulled low and remains

low for the duration of a normal charge cycle. When charg-

ing is complete, i.e., the BAT pin reaches 4.200V and the

charge current has dropped to one tenth of the programmed

value, the CHRG pin is released (Hi-Z). If a fault occurs,

the pin is switched at 35kHz. While switching, its duty

cycle is modulated between a high and low value at a very

low frequency. The low and high duty cycles are disparate

enough to make an LED appear to be on or off thus giving

the appearance of blinking. Each of the two faults has its

own unique blink rate for human recognition as well as

two unique duty cycles for machine recognition.

The CHRG pin does not respond to the C/10 threshold if

the LTC3566 family is in V

BUS

current limit. This prevents

false end of charge indications due to insufﬁ cient power

available to the battery charger.

Table 1 illustrates the four possible states of the CHRG

pin when the battery charger is active.

An NTC fault is represented by a 35kHz pulse train whose

duty cycle alternates between 6.25% and 93.75% at a

1.5Hz rate. A human will easily recognize the 1.5Hz rate

as a slow blinking which indicates the out-of-range battery

LTC3566/LTC3566-2

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of the NTC thermistor rises. The LTC3566 family is also

designed to pause charging when the value of the NTC

thermistor increases to 3.25 times the value of R25. For

Vishay curve 1 this resistance, 325k, corresponds to

approximately 0°C. The hot and cold comparators each

have approximately 3°C of hysteresis to prevent oscillation

about the trip point. Grounding the NTC pin disables the

NTC charge pausing function.

Thermal Regulation

To optimize charging time, an internal thermal feedback

loop may automatically decrease the programmed charge

current. This will occur if the die temperature rises to

approximately 110°C. Thermal regulation protects the

LTC3566 family from excessive temperature due to high

power operation or high ambient thermal conditions and

allows the user to push the limits of the power handling

capability with a given circuit board design without risk of

damaging the part or external components. The beneﬁ t of

the LTC3566 family thermal regulation loop is that charge

current can be set according to actual conditions rather

than worst-case conditions with the assurance that the

battery charger will automatically reduce the current in

worst-case conditions.

Buck-Boost DC/DC Switching Regulator

The LTC3566 family contains a 2.25MHz constant-fre-

quency voltage mode buck-boost switching regulator. The

regulator provides up to 1A of output load current. The

buck-boost can be programmed to a minimum output volt-

age of 2.75V and can be used to power a microcontroller

core, microcontroller I/O, memory, disk drive, or other logic

circuitry. To suit a variety of applications, a selectable mode

function allows the user to trade off noise for efﬁ ciency.

Two modes are available to control the operation of the

LTC3566 family’s buck-boost regulator. At moderate to

heavy loads, the constant frequency PWM mode provides

the least noise switching solution. At lighter loads Burst

Mode operation may be selected. The output voltage is

programmed by a user supplied resistive divider returned

to the FB1 pin. An error ampliﬁ er compares the divided

output voltage with a reference and adjusts the compen-

sation voltage accordingly until the FB1 has stabilized at

0.8V. The buck-boost regulator also includes a soft-start to

limit inrush current and voltage overshoot when powering

on, short circuit current protection, and switch node slew

limiting circuitry for reduced radiated EMI.

Input Current Limit

The input current limit comparator will shut the input

PMOS switch off once current exceeds 2.5A (typical). The

2.5A input current limit also protects against a grounded

OUT1

node.

Output Overvoltage Protection

If the FB1 node were inadvertently shorted to ground, then

the output would increase indeﬁ nitely with the maximum

current that could be sourced from V

IN1

. The LTC3566

family protects against this by shutting off the input PMOS

if the output voltage exceeds a 5.6V (typical).

Low Output Voltage Operation

When the output voltage is below 2.65V (typical) during

start-up, Burst Mode operation is disabled and switch D

is turned off (allowing forward current through the well

diode and limiting reverse current to 0mA).

Buck-Boost Regulator PWM Operating Mode

In PWM mode the voltage seen at FB1 is compared to a

0.8V reference. From the FB1 voltage an error ampliﬁ er

generates an error signal seen at V

. This error signal

commands PWM waveforms that modulate switches A,

B, C and D. Switches A and B operate synchronously as

do switches C and D. If V

IN1

is signiﬁ cantly greater than

the programmed V

OUT1

, then the converter will operate

in buck mode. In this mode switches A and B will be

modulated, with switch D always on (and switch C always

off), to step-down the input voltage to the programmed

output. If V

IN1

is signiﬁ cantly less than the programmed

OUT1

, then the converter will operate in boost mode. In

this mode switches C and D are modulated, with switch A

always on (and switch B always off), to step-up the input

voltage to the programmed output. If V

IN1

is close to the

programmed V

OUT1

, then the converter will operate in

4-switch mode. In this mode the switches sequence through

the pattern of AD, AC, BD to either step the input voltage

up or down to the programmed output.

OPERATION

LTC3566/LTC3566-2

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Buck-Boost Regulator Burst Mode Operation

In Burst Mode operation, the buck-boost regulator uses

a hysteretic FB1 voltage algorithm to control the output

voltage. By limiting FET switching and using a hysteretic

control loop, switching losses are greatly reduced. In this

mode output current is limited to 50mA typical. While

operating in Burst Mode operation, the output capacitor

is charged to a voltage slightly higher than the regulation

point. The buck-boost converter then goes into a sleep

state, during which the output capacitor provides the

load current. The output capacitor is charged by charg-

ing the inductor until the input current reaches 275mA

typical and then discharging the inductor until the reverse

current reaches 0mA typical. This process is repeated

until the feedback voltage has charged to 6mV above the

regulation point. In the sleep state, most of the regulator’s

circuitry is powered down, helping to conserve battery

power. When the feedback voltage drops 6mV below the

regulation point, the switching regulator circuitry is pow-

ered on and another burst cycle begins. The duration for

which the regulator sleeps depends on the load current

and output capacitor value. The sleep time decreases as

the load current increases. The maximum load current in

Burst Mode operation is 50mA. The buck-boost regulator

will not go to sleep if the current is greater than 50mA

and if the load current increases beyond this point while

in Burst Mode operation the output will lose regulation.

Burst Mode operation provides a signiﬁ cant improve-

ment in efﬁ ciency at light loads at the expense of higher

output ripple when compared to PWM mode. For many

noise-sensitive systems, Burst Mode operation might

be undesirable at certain times (i.e. during a transmit or

receive cycle of a wireless device), but highly desirable

at others (i.e. when the device is in low power standby

mode). The MODE pin is used to enable or disable Burst

Mode operation at any time, offering both low noise and

low power operation when they are needed.

OPERATION

Table 2. USB Current Limit Settings

ILIM1 ILIM0 USB SETTING

0 0 1x Mode (USB 100mA Limit)

0 1 10x Mode (Wall 1A Limit)

1 0 Suspend

1 1 5x Mode (USB 500mA Limit)

Table 3. Switching Regulator Modes

MODE SWITCHING REGULATOR MODE

0 PWM Mode

1 Burst Mode Operation

Buck-Boost Regulator Soft-Start Operation

Soft-start is accomplished by gradually increasing the

reference voltage input to the error ampliﬁ er over a 0.5ms

(typical) period. This limits transient inrush currents during

start-up because the output voltage is always in regulation.

Ramping the reference voltage input also limits the rate of

increase in the V

voltage which helps minimize output

overshoot during start-up. A soft-start cycle occurs when-

ever the buck-boost is enabled, or after a fault condition

has occurred (thermal shutdown or UVLO). A soft-start

cycle is not triggered by changing operating modes. This

allows seamless operation when transitioning between

Burst Mode operation and PWM mode.

Low Supply Operation

The LTC3566 family incorporates an undervoltage lockout

circuit on V

OUT

(connected to V

IN1

) which shuts down the

buck-boost regulator when V

OUT

drops below 2.6V. This

UVLO prevents unstable operation.

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LTC3566EUF#TRPBF

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Battery Management High Effiency USB Pwr Mgr+ 1A Buck/Boost

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