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MC10H605FNR2

P1-P3P4-P6P7-P7
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 7
1 Publication Order Number:
MC10H605/D
MC10H605, MC100H605
Registered Hex ECL to TTL
Translator
Description
The MC10/100H605 is a 6−bit, registered, dual supply ECL to TTL
translator. The device features differential ECL inputs for both data
and clock. The TTL outputs feature balanced 24 mA sink/source
capabilities for driving transmission lines.
With its differential ECL inputs and TTL outputs the H605 device is
ideally suited for the receive function of a HPPI bus type
board−to−board interface application. The on chip registers simplify
the task of synchronizing the data between the two boards.
A V
BB
reference voltage is supplied for use with single−ended data
or clock. For single−ended applications the V
BB
output should be
connected to the “bar” inputs (Dn or CLK) and bypassed to ground via
a 0.01 mF capacitor. To minimize the skew of the device differential
clocks should be used.
The ECL level Master Reset pin is asynchronous and common to all
flip−flops. A “HIGH” on the Master Reset forces the Q outputs
“LOW”.
The device is available in either ECL standard: the 10H device is
compatible with MECL 10H™ logic levels while the 100H device is
compatible with 100K logic levels.
Features
• Differential ECL Data and Clock Inputs
• 24 mA Sink, 24 mA Source TTL Outputs
• Dual Power Supply
• Multiple Power and Ground Pins to Minimize Noise
• 2.0 ns Part−to−Part Skew
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM*
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G= Pb−Free Package
PLCC−28
FN SUFFIX
CASE 776
MCxxxH605G
AWLYYWW
1
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
MC10H605, MC100H605
http://onsemi.com
2
V
CCT
Figure 1. Pinout: PLCC−28
(Top View)
Q2
567891011
25 24 23 22 21 20 19
Q1
Q0
GND
CLK
CLK
V
BB
D4
D5
D5
D4
V
CCE
D3
D3
26
27
28
2
3
4
18
17
16
14
13
12
15
Q3 V
CCT
Q4 GND Q5 MR
D0 D0
V
EE
D1 D1 D2 D2
Table 1. PIN DESCRIPTION
PIN FUNCTION
D0−D5
D0−D5
CLK, CLK
MR
Q0−Q5
V
CCE
V
CCT
GND
V
EE
True ECL Data Inputs
Inverted ECL Data Inputs
Differential ECL Clock Input
ECL Master Reset Input
TTL Outputs
ECL V
CC
TTL V
CC
TTL Ground
ECL V
EE
Dn
L
H
X
Table 2. TRUTH TABLE
MR
L
L
H
TCLK/CLK
Z
Z
X
Qn+1
L
H
L
Z = LOW to HIGH Transition
D
n
Q
n
MR
CLK
CLK
V
BB
1 OF 6 BITS
D
CLK
R
Q
Figure 2. Logic Diagram
D
n
MC10H605, MC100H605
http://onsemi.com
3
Table 3. 10H ECL DC CHARACTERISTICS (V
CCT
= +5.0 V ±10%; V
EE
= −5.20 V ±5%)
Symbol Characteristic Condition
0°C 25°C 85°C
Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Supply Current 63 75 63 75 61 75 mA
I
INH
Input HIgh Current 255 175 175
mA
I
INL
Input Low Current 0.5 0.5 0.5
mA
V
IH
Input High Voltage −1170 −840 −1130 −810 −1060 −720 mV
V
IL
Input Low Voltage −1950 −1480 −1950 −1480 −1950 −1480 mV
V
BB
Output Bias Voltage −1400 −1280 −1370 −1270 −1330 −1210 mV
V
Diff
Input Differential Voltage 150 150 150 mV
V
max
CMRR
Input Common Mode Re-
ject Range
0 0 0 mV
V
min
CMRR
Input Common Mode Re-
ject Range
V
EE
= −4.94
V
EE
= −5.20
V
EE
= −5.46
−2800
−3000
−3300
−2800
−3000
−3300
−2800
−3000
−3300
mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 4. 100H ECL DC CHARACTERISTICS (V
CCT
= +5.0 V ±5%; V
EE
= −4.2 V to 5.5 V)
Symbol Characteristic Condition
0°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Supply Current 65 75 65 75 70 85 mA
I
INH
Input HIgh Current 255 175 175
mA
I
INL
Input Low Current 0.5 0.5 0.5
mA
V
IH
Input High Voltage −1165 −880 −1165 −880 −1165 −880 mV
V
IL
Input Low Voltage −1810 −1475 −1810 −1475 −1810 −1475 mV
V
BB
Reference Voltage −1400 −1280 −1400 −1280 −1400 −1200 mV
V
Diff
Input Differential Voltage 150 150 150 mV
V
max
CMRR
Input Common Mode Re-
ject Range
0 0 0 mV
V
min
CMRR
Input Common Mode Re-
ject Range
V
EE
= −4.20
V
EE
= −4.50
V
EE
= −4.80
−2000
−2200
−2400
−2000
−2200
−2400
−2000
−2200
−2400
mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
P1-P3P4-P6P7-P7

MC10H605FNR2

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Manufacturer:
ON Semiconductor
Description:
Translation - Voltage Levels Registered Hex
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