MAX6902
SPI-Compatible RTC in a TDFN
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unusable, and always read zero. Any data written to
bits 0–6 are ignored. Bit 7 must be set to zero before a
single write to the clock, before a write to RAM, or dur-
ing a Burst Write to the clock.
Example: Setting the Clock
with a Burst Write
To set the clock to 10:11:31PM, Thursday July 4th,
2002 with a burst write operation, write 3Fh as the
Address/Command byte, followed by 8 bytes, 31h, 11h,
B0h, 04h, 07h, 05h, 02h, and 00h (Figure 2). 3Fh is the
Clock Burst Write Address/Command. The first byte,
31h, sets the Seconds register to 31. The second byte,
11h, sets the Minutes register to 11. The third byte,
B0h, sets the Hours register to 12hr mode, and 10PM.
The fourth byte, 04h, sets the Date register (day of the
month) to the 4th. The fifth byte, 07h, sets the Month
register to July. The sixth byte, 05h, sets the Day regis-
ter (day of the week) to Thursday. The seventh byte,
02h, sets the Year register to 02. The eighth byte, 00h,
clears the Write-Protect bit of the Control register to
allow writing to the MAX6902. The Century register is
not accessed with a Burst Write and therefore must be
written to separately to set the century to 20. Note the
Century register corresponds to the thousand and hun-
dred digits of the current year and defaults to 19.
Reading the Clock
Reading the Timekeeping Registers
The main timekeeping registers (Seconds, Minutes,
Hours, Date, Month, Day, Year) can be read with either
Single Reads or a Burst Read. In the MAX6902, a latch
buffers each clock counter’s data. Clock counter data
are latched by the SPI Read Command (on the falling
edge of SCLK, after the Address/Command byte has
been sent by the master to read a timekeeping regis-
ter). Collision-detection circuitry ensures that this does
not happen coincident with a Seconds counter incre-
ment to ensure accurate time data are being read. The
clock counters continue to count and keep accurate
time during the read operation.
The simplest way to read the timekeeping registers is to
use a Burst Read. In a Burst Read, the main timekeep-
ing registers (Seconds, Minutes, Hours, Date, Month,
Day, Year), and the Control register are read sequen-
tially, in the order listed with the Seconds register first.
They are read out as a group of eight registers, with 8
bits each. All timekeeping registers (except Century)
are latched upon the receipt of the Burst Read com-
mand. The worst-case error between the “actual” time
and the “read” time is 1s for a normal data transfer.
The timekeeping registers may also be read using
Single Reads. If Single Reads are used, it is necessary
to do some error checking on the receiving end,
because it is possible that the clock counters could
change during the Read operations, and report inaccu-
rate time data. The potential for error is when the
Seconds register increments before all the registers are
read. For example, suppose a carry of 13:59:59 to
14:00:00 occurs during single read operations. The net
data read could be 14:59:59, which is erroneous. To
prevent errors from occurring with single read opera-
tions, read the Seconds register first (initial-seconds)
and store this value for future comparison. After the
remaining timekeeping registers have been read,
reread the Seconds register (final-seconds). Check that
the final-seconds value equals the initial-seconds
value. If not, repeat the entire Single Read process.
Using Single Reads at a 100kHz serial speed, it takes
under 2.5ms to read all seven of the timekeeping regis-
ters, including two reads of the Seconds register.
Example: Reading the Clock
with a Burst Read
To read the time with a Burst Read, send BFh as the
Address/Command byte. Then clock out 8 bytes,
Seconds, Minutes, Hours, Date of the month, Month,
Day of the week, Year, and finally the Control byte. All
data are output MSB first. Decode the required informa-
tion based on the register definitions listed in Figure 2.
Using the Alarm
A polled alarm function is available by reading the ALM
OUT bit. The ALM OUT bit is D7 of the Minutes timekeep-
ing register. A logic 1 in ALM OUT indicates the Alarm
function is triggered. There are eight registers associated
with the alarm function—seven programmable Alarm
Threshold registers and one programmable Alarm
Configuration register. The Alarm Configuration register
determines which Alarm Threshold registers are com-
pared to the timekeeping registers, and the ALM OUT bit
sets if the compared registers are equal. Figure 2 shows
the function of each bit of the Alarm Configuration regis-
ter. Placing a logic 1 in any given bit of the Alarm
Configuration register enables the respective alarm func-
tion. For example, if the Alarm Configuration register is set
to 0000 0011, ALM OUT is set when both the minutes and
seconds indicated in the Alarm Threshold registers match
the respective timekeeping registers. Once set, ALM OUT
stays high until it is cleared by reading or writing to the
Alarm Configuration register, or by reading or writing to
any of the Alarm Threshold registers. The Alarm
Configuration register is written with address 15h, and
read with address 95h.
