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ISL97642IRTZ-T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
4
FN6436.0
June 18, 2007
OPERATIONAL AMPLIFIERS
V
SUP
Supply Operating Range 4.5 18 V
I
SUP
Supply Current per Amplifier 600 800 µA
V
OS
Offset Voltage 312mV
I
B
Input Bias Current -50 +50 nA
CMIR Common Mode Input Range 0 V
SUP
V
CMRR Common Mode Rejection Ratio 60 90 dB
A
OL
Open Loop Gain 110 dB
V
OH
Output Voltage High I
OUT
= 100µA V
SUP
-15 V
SUP
-2 mV
I
OUT
= 5mA V
SUP
-250 V
SUP
-150 mV
V
OL
Output Voltage Low I
OUT
= -100µA 2 30 mV
I
OUT
= -5mA 100 150 mV
I
SC
Short-Circuit Current 100 150 mA
I
CONT
Continuous Output Current ±50 mA
PSRR Power Supply Rejection Ratio 60 100 dB
BW
-3dB
-3dB Bandwidth 12 MHz
GBWP Gain Bandwidth Product 8 MHz
SR Slew Rate 12 V/µs
POSITIVE LDO
V
FBP
Positive Feedback Voltage I
DRVP
= 100µA, T
A
= +25°C 1.176 1.2 1.224 V
I
DRVP
= 100µA 1.176 1.2 1.229 V
V
FTP
V
FBP
Fault Trip Level V
FBP
falling 0.82 0.9 0.98 V
I
BP
Positive LDO Input Bias Current V
FBP
= 1.4V -50 50 nA
V
POS
/I
POS
FBP Load Regulation V
DRVP
= 25V, I
DRVP
= 0µA to 20µA 0.5 %
I
DRVP
Sink Current V
FBP
= 1.1V, V
DRVP
= 10V 2 4 mA
I
LEAK
P DRVP Off Leakage Current V
FBP
= 1.4V, V
DRVP
= 30V 0.1 10 µA
t
SS
P Soft-Start Period C
DEL
= 100nF 7 ms
NEGATIVE LDO
V
FBN
FBN Regulation Voltage I
DRVN
= 0.2mA, T
A
= +25°C 0.173 0.203 0.233 V
I
DRVN
= 0.2mA 0.171 0.203 0.235 V
V
FTN
V
FBN
Fault Trip Level V
FBN
rising 380 430 480 mV
I
BN
Negative LDO Input Bias Current V
FBN
= 250mV -50 50 nA
FBN Load Regulation V
DRVN
= -6V, I
DRVN
= 2µA to 20µA 0.5 %
I
DRVN
Source Current V
FBN
= 500mV, V
DRVN
= -6V 2 4 mA
I
LEAK
N DRVN Off Leakage Current V
FBP
= 1.35V, V
DRVP
= 30V 0.1 10 µA
t
SS
N Soft-start Period C
DEL
= 100nF 7 ms
V
ON
-SLICE CIRCUIT
V
LO
CTL Input Low Voltage V
IN
= 2.6V to 5.5V 0.4V
IN
V
V
HI
CTL Input High Voltage V
IN
= 2.6V to 5.5V 0.6V
IN
V
Electrical Specifications V
IN
= 3V, V
BOOST
= V
SUP
= 12V, V
SRC
= 20V, Over-temperature from -40°C to +85°C.
Unless Otherwise Specified. (Continued)
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
ISL97642
5
FN6436.0
June 18, 2007
I
LEAK
CTL CTL Input Leakage Current CTL = AGND or IN -1 1 µA
t
D
rise CTL to OUT Rising Prop Delay 1k from DRN to 8V, V
CTL
= 0V to
3V step, no load on OUT, measured
from V
CTL
= 1.5V to OUT = 20%
100 ns
t
D
fall CTL to OUT Falling Prop Delay 1k from DRN to 8V, V
CTL
= 3V to
0V step, no load on OUT, measured
from V
CTL
= 1.5V to OUT = 80%
100 ns
V
SRC
SRC Input Voltage Range 30 V
ISRC SRC Input Current Start-up sequence not completed 150 250 µA
Start-up sequence completed 150 250 µA
r
ON
SRC SRC ON-resistance Start-up sequence completed 5 10
r
ON
DRN DRN ON-resistance Start-up sequence completed 30 60
SEQUENCING
t
ON
Turn On Delay C
DEL
= 100nF (See Figure 22) 10 ms
t
DEL1
Delay Between V
BOOST
and V
OFF
C
DEL
= 100nF (See Figure 22) 10 ms
t
DEL2
Delay Between V
ON
and V
OFF
C
DEL
= 100nF (See Figure 22) 10 ms
t
DEL3
Delay From V
ON
to V
ON
-slice Enabled C
DEL
= 100nF (See Figure 22) 10 ms
C
DEL
Delay Capacitor 22 100 nF
NOTE:
1. Limits should be considered typical and are not production tested.
Electrical Specifications V
IN
= 3V, V
BOOST
= V
SUP
= 12V, V
SRC
= 20V, Over-temperature from -40°C to +85°C.
Unless Otherwise Specified. (Continued)
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
ISL97642
6
FN6436.0
June 18, 2007
Pin Descriptions
PIN NAME ISL97642 PIN FUNCTION
SRC 1 Upper reference voltage for switch output
REF 2 Internal reference bypass terminal
AGND 3 Analog ground for boost converter and control circuitry
PGND 4 Power ground for boost switch
OUT1 5 Operational amplifier 1 output
NEG1 6 Operational amplifier 1 inverting input
POS1 7 Operational amplifier 1 non-inverting input
OUT2 8 Operational amplifier 2 output
NEG2 9 Operational amplifier 2 inverting input
POS2 10 Operational amplifier 2 non-inverting input
BGND 11 Operational amplifier ground
POS3 15 Operational amplifier 3 non-inverting input
NEG3 16 Operational amplifier 3 inverting input
OUT3 17 Operational amplifier 3 output
SUP 14 Amplifier positive supply rail. Bypass to BGND with 0.1µF capacitor
POS3 15 Operational amplifier 3 non-inverting input
NEG3 16 Operational amplifier 3 inverting input
OUT3 17 Operational amplifier 3 output
NC 18
NC 19
NC 20
LX 21 Main boost regulator switch connection
IN 22 Main supply input; bypass to AGND with 1µF capacitor
FB 23 Main boost feedback voltage connection
COMP 24 Error amplifier compensation pin
FBP 25 Positive LDO feedback connection
DRVP 26 Positive LDO transistor drive
FBN 27 Negative LDO feedback connection
DRVN 28 Negative LDO transistor driver
DEL 29 Connection for switch delay timing capacitor
CTL 30 Input control for switch output
DRN 31 Lower reference voltage for switch output
COM 32 Switch output; when CTL = 1, COM is connected to SRC through a 15 resistor; when CTL = 0,
COM is connected to DRN through a 30 resistor
ISL97642
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

ISL97642IRTZ-T

Mfr. #:
Buy ISL97642IRTZ-T
Manufacturer:
Renesas / Intersil
Description:
Voltage Regulators - Switching Regulators TFT-LCD DC-DC W/ INTEGRTD AMP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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