Datasheet
13/20
BAxxDD0xx BAxxCC0xx
TSZ02201-0R6R0A600130-1-2
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
26.Jun.2012 Rev.001
www.rohm.com
I/O equivalence circuit
<BAxxDD0xx Series> <BAxxCC0xx Series>
Fig.27
Fig.28
Power Dissipation
Vcc
CTL
39kΩ 2kΩ
31kΩ
10kΩ
Vcc
OUT
R2
R1
Vcc
CTL
25kΩ
25kΩ
10kΩ
OUT
R2
R1
Vcc
Fig.29
Fig.30
Fig.31
0.0
0.4
0.8
1.2
1.6
2.0
0 25 50 75 100 125 150
Ambient temperature:Ta(
℃)
Power Dissipation:Pd(W)
Mounted on a Rohm standard board
Board size : 70
×70×1.6
Copper foil area :7
×7
TO252-5
θja=96.2(/W)
1.30
0
5
10
15
20
25
0 25 50 75 100 125 150
Ambient temperature:Ta(℃
Power Dissipation:Pd(W
)
(1)20.0
(2)2.0
When using a maximum heat sick :
θj-c=6.25(/W)
When using an IC alone :
θj-6=62.5(/W)
0
1
2
3
4
5
6
7
8
9
10
0 25 50 75 100 125 150
Ambient temperature:Ta(
℃)
Power Dissipation:Pd(W)
Board size : 70×70×1.6
3
(board contains a thermal via)
Board front copper foil area : 10.5×10.5
2
2-layer board (back surface copper foil area :15×15
2
)
2-layer board (back surface copper foil area :70×70
2
)
4-layer board (back surface copper foil area :70×70
2
)
7.3W
5.5W
2.3W
HRP-5
TO220FP-5
TO252-5
Datasheet
14/20
BAxxDD0xx BAxxCC0xx
TSZ02201-0R6R0A600130-1-2
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
26.Jun.2012 Rev.001
www.rohm.com
When using at temperatures over Ta=25, please refer to the heat reducing characteristics shown in Fig.29 through 31.
The IC characteristics are closely related to the temperature at which the IC is used and if the temperature exceeds the
maximum junction temperature Tj
MAX., the elements may be damaged or destroyed. From the standpoints of instantaneous
destruction and long-term operating reliability, it is necessary give sufficient consideration to IC heat. In order to protect the
IC from thermal damage, it is necessary to operate it at temperatures lower than the maximum junction temperature TjMAX
of the IC.
Fig.30 shows the acceptable loss and heat reducing characteristics of the TO220FP package The portion shown by the
diagonal line is the acceptable loss range that can be used with the IC alone. Even when the ambient temperature Ta is a
normal temperature (25), the chip (junction) temperature Tj may be quite high so please operate the IC at temperatures
less than the acceptable loss Pd.
The method of calculating the power consumption Pc (W) is as follows.
Pc = (Vcc-Vo) × Io Vcc × Icca
Acceptable loss PdPc
Solving this for load current I
O
in order to operate within the acceptable loss:
Io
(Please refer to Fig.10 and 22 for Icca.)
It is then possible to find the maximum load current Io
MAX with respect to the applied voltage Vcc at the time of thermal design.
Calculation Example
Example 1) When Ta=85, Vcc=8.3V, Vo=3.3V, BA33DD0WT
Io With the IC alone : θja=62.5/W -16mW/
Io200mA (Icca : 2mA) 25=2000mW 85=1040mW
Please refer to the above information and keep thermal designs within the scope of acceptable loss for all operating
temperature ranges.
The power consumption Pc of the IC when there is a short circuit (short between Vo and GND) is:
Pc=Vcc×(IccaIshort)
*Ishort: Short circuit current
Peripheral Circuit Considerations
Vcc Terminal
Please attach a capacitor (greater than 0.33µF) between the Vcc and GND.
The capacitance values will differ depending on the application, so please take this into account when configuring the terminal.
GND Terminal
Please be sure to keep the set ground and IC ground at the same potential level so that a potential difference does not
arise between them.
If a potential difference arises between the set ground and the IC ground, the preset voltage will not be outputted,
causing the system to become unstable. Therefore, please reduce the impedance by making the ground patterns as wide
as possible and by reducing the distance between the set ground and the IC ground as much as possible.
CTL Terminal
The CTL terminal is turned ON at 2.0V and higher and OFF at 0.8V and lower within the operating power supply voltage range.
The power supply and the CTL terminal may be started up and shut down in any order without problems.
Vo Terminal
Fig.32 Output Equivalent Circuit Fig.33 ESR-Io Characteristics Fig.34 ESR vs. Io Characteristics
(BAxxCC0) (BAxxDD0)
Please attach an anti-oscillation capacitor between V
o and GND. The capacitance of the capacitor may significantly change
due to factors such as temperature changes, making it impossible to completely stop oscillations. Please use a tantalum
capacitor or aluminum electrolysis capacitor with favorable characteristics and small internal series resistance (ESR) even
at low temperatures. The output fluctuates regardless of whether the ESR is large or small. Please use the IC within the
stable operating region while referring to the ESR characteristics reference data shown in Fig.32 through 34. In applications
where there are sudden load fluctuations, the use of a capacitor with large capacitance is recommended.
Pd – Vcc×Icca
VccVo
Vcc
Vo
Io
Vcca
Input voltage
Output voltage
Load current
Circuit current
1.048.3×Icca
5
OUT
22
μ
F
IC
OUTPUT CURRENTlo(mA)
10000
1
0.1
1
10
1
Unstable operating region
Unstable operating region
Stable operating region
EFFECTIVE SERIES RESISTANCE:ESR [Ω]
10
100
1000
100
200
400
800
1000
0.1
1
10
Stable operating region
0
600
Unstable operating region
Unstable operating region
OUTPUT CURRENTlo(mA)
EFFECTIVE SERIES RESISTANCE:ESR [Ω]
100
Datasheet
15/20
BAxxDD0xx BAxxCC0xx
TSZ02201-0R6R0A600130-1-2
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
26.Jun.2012 Rev.001
www.rohm.com
Operational Notes
1) Protection Circuits
Over-current Protection Circuit
A built-in over-current protection circuit corresponding to the current capacity prevents the destruction of the IC when there
are load shorts. This protection circuit is a “7”-shaped current control circuit that is designed such that the current is restricted
and does not latch even when a large current momentarily flows through the system with a high-capacitance capacitor.
However, while this protection circuit is effective for the prevention of destruction due to unexpected accidents, it is not
suitable for continuous operation or transient use. Please be aware when creating thermal designs that the overcurrent
protection circuit has negative current capacity characteristics with regard to temperature (Refer to Fig.6 and 18).
Thermal Shutdown Circuit (Thermal Protection)
This system has a built-in temperature protection circuit for the purpose of protecting the IC from thermal damage.
As shown above, this must be used within the range of acceptable loss, but if the acceptable loss happens to be
continuously exceeded, the chip temperature Tj increases, causing the temperature protection circuit to operate.
When the thermal shutdown circuit operates, the operation of the circuit is suspended. The circuit resumes operation
immediately after the chip temperature Tj decreases, so the output repeats the ON and OFF states (Please refer to
Fig.14 and 26 for the temperatures at which the temperature protection circuit operates).
There are cases in which the IC is destroyed due to thermal runaway when it is left in the overloaded state. Be sure to
avoid leaving the IC in the overloaded state.
Reverse Current
In order to prevent the destruction of the IC when a reverse current flows through the IC, it is recommended that a diode
be placed between the Vcc and Vo and a pathway be created so that the current can escape (Refer to Fig.35).
Fig.35 Bypass diode
2) This IC is bipolar IC that has a P-board (substrate) and P+ isolation layer between each devise, as shown in Fig.36. A
P-N junction is formed between this P-layer and the N-layer of each device, and the P-N junction operates as a parasitic
diode when the electric potential relationship is GND> Pin A, GND> Pin B, while it operates as a parasitic transistor when
the electric potential relationship is Pin B GND> Pin A. Parasitic devices are structurally inevitable in the IC. The
operation of parasitic devices induces mutual interference between circuits, causing malfunctions and eventually the
destruction of the IC. It is necessary to be careful not to use the IC in ways that would cause parasitic elements to
operate. For example, applying a voltage that is lower than the GND (P-board) to the input terminal.
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this doc
ument formal version takes priority.
OUT
Vcc
CTL
GND
Reverse current
Fig.36 Example of the basic structure of a bipolar IC
(Pin A)
GND
N
P+
Resistor
Parasitic element
P
N
P
P+
N
(Pin A)
Parasitic element
or transistor
(Pin B)
GND
C
B
E
Parasitic element
GND
GND
N
P
N
P+
P+
Parasitic element
or transistor
(Pin B)
B
E
Transistor (NPN)
N
P
N
GND
C

BA33DD0WHFP-TR

Mfr. #:
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LDO Voltage Regulators 5 3.3V
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