AD7247ABRZ-REEL Datasheet AD7247AARZ-REEL7, AD7237JNZ, AD7237JRZ | P10-P12

AD7237A/AD7247A

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APPLYING THE AD7237A/AD7247A

The internal scaling resistors provided on the AD7237A/

AD7247A allow several output voltage ranges. The part can

produce unipolar output ranges of 0 V to +5 V or 0 V to +10 V

and a bipolar output range of ±5 V. Connections for the various

ranges are outlined below. Since each DAC has its own R

OFS

input the two DACs on each part can be set up for different

output ranges.

Unipolar (0 V to +10 V) Configuration

The first of the configurations provides an output voltage range

of 0 V to +10 V. This is achieved by connecting the output off-

set resistor, R

OFSA

, or R

OFSB

, to AGND (GND for AD7247A).

In this configuration, the AD7237A/AD7247A can be operated

from single or dual supplies. Figure 8 shows the connection dia-

gram for unipolar operation for DAC A of the AD7237A, while

the table for output voltage versus digital code in the DAC latch

is shown in Table III. Similar connections apply to the AD7247A.

Figure 8. Unipolar (0 to +10 V) Configuration

Table III. Unipolar Code Table (0 to +10 V Range)

DAC Latch Contents

MSB LSB Analog Output, V

OUT

1111 1111 1111 +2 • REF IN (4095/4096)

1000 0000 0001 +2 • REF IN (2049/4096)

1000 0000 0000 +2 • REF IN (2048/4096) = +REF IN

0111 1111 1111 +2 • REF IN (2047/4096)

0000 0000 0001 +2 • REF IN (1/4096)

0000 0000 0000 0 V

Note: 1 LSB = REF IN/2048.

Unipolar (0 V to +5 V) Configuration

The 0 V to +5 V output voltage range is achieved by tying R

OFSA

or R

OFSB

to V

OUTA

or V

OUTB

. Once again, the AD7237A/

AD7247A can be operated single supply or from dual supplies.

The table for output voltage versus digital code is as in Table

III, with 2 • REF IN replaced by REF IN. Note, for this range,

1 LSB = REF IN • (2

–12

) = (REF IN/4096).

Bipolar Configuration

The bipolar configuration for the AD7237A/AD7247A, which

gives an output range of –5 V to +5 V, is achieved by connect-

ing R

OFSA

, or R

OFSB

, to REF IN. The AD7237A/AD7247A must

be operated from dual supplies to achieve this output voltage

range. Figure 9 shows the connection diagram for bipolar opera-

tion for DAC A of the AD7247A. An AD586 provides the refer-

ence voltage for the DAC but this could be provided by the

on-chip reference by connecting REF OUT to REF IN. The

code table for bipolar operation is shown in Table IV. Similar

connections apply for the AD7237A.

Figure 9. Bipolar Configuration

Table IV. Bipolar Code Table

DAC Latch Contents

MSB LSB Analog Output, V

OUT

1111 1111 1111 +REF IN • (2047/2048)

1000 0000 0001 +REF IN • (1/2048)

1000 0000 0000 0 V

0111 1111 1111 –REF IN • (1/2048)

0000 0000 0001 –REF IN • (2047/2048)

0000 0000 0000 –REF IN • (2048/2048) = –REF IN

Note: 1 LSB = REF IN/2048.

AD7237A/AD7247A

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MICROPROCESSOR INTERFACING—AD7247A

Figures 10 to 12 show interfaces between the AD7247A and

the ADSP-2101 DSP processor and the 8086 and 68000 16-bit

microprocessors. In all three interfaces, the AD7247A is

memory-mapped with a separate memory address for each DAC.

AD7247A—ADSP-2101 Interface

Figure 10 shows an interface between the AD7247A and the

ADSP-2101. The 12-bit word is written to the selected DAC

latch of the AD7247A in a single instruction, and the analog

output responds immediately. Depending on the clock fre-

quency of the ADSP-2101, either one or two wait states will

have to be programmed into the data memory wait state control

Figure 10. AD7247A to ADSP-2101 Interface

AD7247A—8086 Interface

Figure 11 shows an interface between the AD7247A and the

8086 microprocessor. The 12-bit word is written to the selected

DAC latch of the AD7247A in a single MOV instruction, and

the analog output responds immediately.

Figure 11. AD7247A to 8086 Interface

AD7247A—MC68000 Interface

Interfacing between the AD7247A and the MC68000 micropro-

cessor is achieved using the circuit of Figure 12. Once again, the

12-bit word is written to the selected DAC latch of the

AD7247A in a single MOVE instruction.

CSA and CSB have to

be AND-gated to provide a

DTACK signal for the MC68000

when either DAC latch is selected.

Figure 12. AD7247A to MC68000 Interface

MICROPROCESSOR INTERFACING—AD7237A

Figures 13 to 15 show the AD7237A configured for interfacing

to microprocessors with 8-bit databus systems. In all cases, data

is right-justified, and the AD7237A is memory-mapped with the

two lowest address lines of the microprocessor address bus driv-

ing the A0 and A1 inputs of the converter.

AD7237A—8085A/8088 Interface

Figure 13 shows the connection diagram for interfacing the

AD7237A to both the 8085A and the 8088. This scheme is also

suited to the Z80 microprocessor, but the Z80 address/ databus

does not have to be demultiplexed. The AD7237A requires five

separate memory addresses, one for the each MS latch and one

for each LS latch and one for the common

LDAC input. Data is

written to the respective input latch in two write operations.

Figure 13. AD7237A to 8085A/8088 Interface

AD7237A/AD7247A

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C1744–24–3/93

PRINTED IN U.S.A.

Either high byte or low byte data can be written first to the in-

put latch. A write to the AD7237A DAC Latch address transfers

the data from the input latches to the respective DAC latches

and updates both analog outputs. Alternatively, the

LDAC in-

put can be asynchronous or can be common to a number of

AD7237As for simultaneous updating of a number of voltage

channels.

AD7237A—68008 Interface

An interface between the AD7237A and the 68008 is shown in

Figure 14. In the diagram shown, the

LDAC is derived from an

asynchronous

LDAC signal, but this can be derived from the

address decoder as in the previous interface diagram.

Figure 14. AD7237A to 68008 Interface

AD7237A—6502/6809 Interface

Figure 15 shows an interface between the AD7237A and the

6502 or 6809 microprocessor. The procedure for writing data to

the AD7237A is as outlined for the 8085A/8088 interface. For

the 6502 microprocessor, the f2 clock is used to generate the

WR, while for the 6809 the E signal is used.

Figure 15. AD7237A to 6502/6809 Interface

OUTLINE DIMENSIONS

Dimensions shown in inchcs and (mm).

Plastic DIP (N-24)

Cerdip (Q-24)

SOIC (R-24)

P1-P3 P4-P6 P7-P9 P10-P12

AD7247ABRZ-REEL

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Digital to Analog Converters - DAC DUAL 12 BIT IC w/ Parallel Load

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AD7247ABRZ-REEL

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