74LVC157A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 2 May 2013 3 of 17
NXP Semiconductors
74LVC157A-Q100
Quad 2-input multiplexer
5. Pinning information
5.1 Pinning
Fig 4. Logic diagram
1Y
1I1
1I0
2Y
2I1
2I0
3Y
3I1
3I0
mna484
4Y
4I1
4I0
S
E
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration for SO16 and (T)SSOP16 Fig 6. Pin configuration for DHVQFN16
DDD
/9&$4
< ,
, ,
, <
*1'

< ,
, ,
, (
*1'
<
6
9
&&
7UDQVSDUHQWWRSYLHZ







WHUPLQDO
LQGH[DUHD
74LVC157A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 2 May 2013 4 of 17
NXP Semiconductors
74LVC157A-Q100
Quad 2-input multiplexer
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
Table 2. Pin description
Symbol Pin Description
S 1 common data select input
1I0 2 data input from source 0
1I1 3 data input from source 1
1Y 4 multiplexer output
2I0 5 data input from source 0
2I1 6 data input from source 1
2Y 7 multiplexer output
GND 8 ground (0 V)
3Y 9 multiplexer output
3I1 10 data input from source 1
3I0 11 data input from source 0
4Y 12 multiplexer output
4I1 13 data input from source 1
4I0 14 data input from source 0
E
15 enable input (active LOW)
V
CC
16 supply voltage
Table 3. Function table
[1]
Input Output
E S nI0 nI1 nY
HXXXL
LLLXL
LLHXH
LHXLL
LHXHH
74LVC157A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 2 May 2013 5 of 17
NXP Semiconductors
74LVC157A-Q100
Quad 2-input multiplexer
7. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO16 packages: above 70 C the value of P
D
derates linearly with 8 mW/K.
For (T)SSOP16 packages: above 60 C the value of P
D
derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 C the value of P
D
derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +6.5 V
I
IK
input clamping current V
I
<0 50 - mA
V
I
input voltage
[1]
0.5 +6.5 V
I
OK
output clamping current V
O
>V
CC
or V
O
<0 - 50 mA
V
O
output voltage
[2]
0.5 V
CC
+0.5 V
I
O
output current V
O
=0V toV
CC
- 50 mA
I
CC
supply current - 100 mA
I
GND
ground current 100 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation T
amb
= 40 C to +125 C
[3]
-500mW
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 1.65 - 3.6 V
functional 1.2 - - V
V
I
input voltage 0 - 5.5 V
V
O
output voltage 0 - V
CC
V
T
amb
ambient temperature 40 - +125 C
t/V input transition rise and fall
rate
V
CC
= 1.65 V to 2.7 V 0 - 20 ns/V
V
CC
= 2.7 V to 3.6 V 0 - 10 ns/V

74LVC157ABQ-Q100X

Mfr. #:
Manufacturer:
Nexperia
Description:
Encoders, Decoders, Multiplexers & Demultiplexers 74LVC157ABQ-Q100/DHVQFN16/REEL
Lifecycle:
New from this manufacturer.
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