AD524
Rev. F | Page 12 of 28
–12 TO +12
+4 TO –4
+8 TO –8
+12 TO –12
–8 TO +8
–4 TO +4
1% 0.1% 0.01%
1% 0.1% 0.01%
OUTPUT
STEP (V)
SETTLING TIME (µs)
0 5 10 15 20
00500-023
Figure 23. Settling Time, Gain = 1
10V 10µs1mV
00500-024
Figure 24. Large Signal Pulse Response and Settling Time, Gain =1
–12 TO +12
+4 TO –4
+8 TO –8
+12 TO –12
–8 TO +8
–4 TO +4
0.01%
0.01%
OUTPUT
STEP (V)
0.1%
1%
1% 0.1%
SETTLING TIME (µs)
0 5 10 15 20
00500-025
Figure 25. Settling Time, Gain = 10
1mV 10V 10µs
0
0500-026
Figure 26. Large Signal Pulse Response and Settling Time, Gain = 10
12 TO +12
+4 TO –4
+8 TO –8
+12 TO –12
–8 TO +8
–4 TO +4
OUTPUT
STEP (V)
1%
1%
0.01%
0.01%
0.1%
0.1%
SETTLING TIME (µs)
0 5 10 15 20
00500-027
Figure 27. Settling Time, Gain = 100
1mV 10V 10µs
0
0500-028
Figure 28. Large Signal Pulse Response and Settling Time, Gain = 100
AD524
Rev. F | Page 13 of 28
–12 TO +12
+4 TO –4
+8 TO –8
+12 TO –12
–8 TO +8
–4 TO +4
OUTPUT
STEP (V)
1% 0.01%
1% 0.01%
0.1%
0.1%
0 102030405060708
SETTLING TIME (µs)
00500-029
0
Figure 29. Settling Time, Gain = 1000
5mV 10V 20µs
0
0500-030
Figure 30. Large Signal Pulse Response and Settling Time, Gain = 1000
AD524
Rev. F | Page 14 of 28
TEST CIRCUITS
AD524
G = 10
G = 100
G = 1000
10k
0.01%
1k
10T
10k
0.1%
V
OUT
+V
S
+
INPUT
20V p-p
11k
0.1%
1k
0.1%
100
0.1%
–V
S
RG
1
RG
2
100k
0.1%
1
16
13
12
9
11
10
6
3
8
7
2
00500-031
Figure 31. Settling Time Test Circuit
–IN
C4C3
+IN
REFERENCE
SENSE
A3
4.44k
404
40
G = 100
G = 1000
Q2, Q4
Q1, Q3
+V
S
I
1
50µA
I
2
50µA
A1 A2
R52
20k
R55
20k
V
O
CH
1
I
4
50µA
–V
S
I
3
50µA
V
B
R53
20k
R54
20k
CH
2
, CH
3
,
CH
4
RG
2
RG
1
CH
1
CH
2
,
CH
3
, CH
4
R57
20k
R56
20k
++
00500-032
Figure 32. Simplified Circuit of Amplifier; Gain Is Defined as
((R56 + R57)/(R
G
)) +1; For a Gain of 1, R
G
Is an Open Circuit

AD524ADZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Instrumentation Amplifiers IC PREC
Lifecycle:
New from this manufacturer.
Delivery:
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