MIC2550AYTS-TR

March 2005 7 M9999-031805
MIC2550A Micrel, Inc.
Block Diagram
Regulator
VM
GND
VP
RCV
OE#
SPD
VIF
D–
D+
VBUS
VTRM
USB VOLTAGE DOMAINSYSTEM I/F
VOLTAGE DOMAIN
TO
INTERNAL
CIRCUITS
SUS
MIC2550A Micrel, Inc.
M9999-031805 8 March 2005
Applications Information
The MIC2550A is designed to provide USB connectivity in
mobile systems where system supply voltages are not avail-
able to satisfy USB requirements. The MIC2550A can oper-
ate down to supply voltages of 2.5V and still meet USB
physical layer specifications. As shown in the system dia-
gram, the MIC2550A takes advantage of USB’s supply
voltage, V
BUS
, to operate the transceiver. The system volt-
age, V
IF
, is used to set the reference voltage used by the
digital I/O lines (VP, VM, RCV, OE#, SPD, and SUS pins)
interfacing to the system. Internal circuitry provides transla-
tion between the USB and system voltage domains. V
IF
will
typically be the main supply voltage rail for the system.
In addition, a 3.3V, 10% termination supply voltage, V
TRM
, is
provided to support speed selection. A 0.47µF (minimum)
capacitor from V
TRM
to ground is required to ensure stability.
A 1.5K resistor is required between this pin and the D+ or D–
lines to respectively specify full-speed or low-speed opera-
tion.
Power Supply Configurations
V
IF
/V
BUS
Switched
When the V
BUS
input pin is pulled to ground a low impedance
path between V
IF
and V
BUS
can cause a high current flow
from V
IF
to V
BUS
thereby damaging the MIC2550A. This
issue can arise in systems where V
BUS
is driven from a power
supply that can be switched off such as in the case of a
desktop PC. Adding a Schottky diode, such as the ZHCS1000
by Zetex, in series with V
BUS
will prevent any current flow
during this condition. A solution is shown in Figure 8 below.
If the V
IF
source is current limited to less than 50mA, then
diode D1 is not necessary.
MIC2550
VIF
Note: *(Optional) See Text - Power Supply Confi
g
urations
VBUS
1µF min
VBUS
USB Device
Power Controller
*(Optional)
D1
ZHCS1000 or
equivalent
Figure 8. Solution to V
IF
/V
BUS
Switching
I/O Interface Using 3.3V
In systems where the I/O interface utilizes a 3.3V USB
controller, an alternate solution is shown in Figure 9. This
configuration has the advantage over Figure 8, in that no
extra components are needed. Ensure that the load on V
TRM
does not exceed 1mA total.
MIC2550
VIF
VBUS
I/O
VBUS
V
P
/V
M
/
RCV/OE#
VTRM
USB
Controller
V
DD
3.3V
Figure 9. I/O Interface Using 3.3V
Internal 3.3V Source
If the device is self-powered and has 3.3V available, the
circuit in Figure 10 is yet another power supply configuration
option. In this configuration, the internal regulator is disabled
and the 3.3V source and not V
BUS
powers the entire chip.
MIC2550A
VIF
3.3V
VBUS
VTRM
Figure 10. Powering Chip
from Internal 3.3V Source
Suspend
When the suspend pin (SUS) is high, power consumption is
reduced to a minimum. V
TRM
is not disabled. RCV, V
P
and V
M
are still functional to enable the device to detect USB activity.
For minimal current consumption in suspend mode, it is
recommended that OE# = 1, and SPD = 0.
Speed
The speed pin (SPD) sets D+/D– output edge rates by increas-
ing or decreasing biasing current sources within the output
drivers. For low speed, SPD = 0. For full speed, SPD = 1. By
setting SPD = 0 during idle periods, in conjunction with suspend
(SUS), the lowest quiescent current can be obtained. However,
designers must provide a 300ns delay between changing SPD
from 0 to 1 and transmission of data at full speed. This delay
ensures the output drivers have arrived at their proper operating
conditions. Failure to do so can result in leading edge distortion
on the first few data bits transmitted.
External ESD Protection
The use of ESD transient protection devices is not required
for operation, but is recommended. We recommend the
following devices or the equivalent:
Cooper Electronics Technologies (www.cooperet.com)
41206ESDA SurgX
®
0805ESDA SurgX
®
Littelfuse (www.littlefuse.com)
V0402MHS05
SP0503BAHT
Non-multiplexed Bus
To save pin count for the USB logic controller interface, the
MIC2550A was designed with V
P
and V
M
as bidirectional
pins. To interface the MIC2550A with a non-multiplexed data
bus, resistors can be used for low cost isolation as shown in
Figure 11.
V
PO
V
P
V
M
V
MO
USB Logic
Controller
(SIE)
MIC2550
V
P
V
M
10k
10k
Figure 11. MIC2550A Interface to
Non-multiplexed Data Bus
March 2005 9 M9999-031805
MIC2550A Micrel, Inc.
PCB Layout Recommendations
Although the USB standard and applications are not based in
an impedance controlled environment, a properly designed
PCB layout is recommended for optimal transceiver perfor-
mance. The suggested PCB layout hints are as follows:
Match signal line traces (VP/VM, D+, D–) to
40ps, approximately
1
/
3
inch if possible. FR-4
PCB material propagation is about 150ps/inch,
so to minimize skew try to keep VP/VM, D+/D–
traces as short as possible.
For every signal line trace width (w), separate
the signal lines by 1.5–2 widths. Place all other
traces at >2w from all signal line traces.
Maintain the same number of vias on each
differential trace, keeping traces approximately
at same separation distance along the line.
Control signal line impedances to ±10%.
Keep R
S
as close to the IC as possible, with
equal distance between R
S
and the IC for both
D+ and D–.

MIC2550AYTS-TR

Mfr. #:
Manufacturer:
Microchip Technology / Micrel
Description:
USB Interface IC USB Transceiver
Lifecycle:
New from this manufacturer.
Delivery:
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