Layout, Grounding, Bypassing
For best performance, use printed circuit boards.
Wire-wrap boards are not recommended. Board layout
should ensure that digital and analog signal lines are
separated from each other. Do not run analog and digi-
tal (especially clock) lines parallel to one another, or
digital lines underneath the ADC package.
Figure 18 shows the recommended system ground
connections. A single-point analog ground (“star”
ground point) should be established at AGND, sepa-
rate from the logic ground. All other analog grounds
and DGND should be connected to this ground. No
other digital system ground should be connected to
this single-point analog ground. The ground return to
the power supply for this ground should be low imped-
ance and as short as possible for noise-free operation.
High-frequency noise in the V
DD
power supply may
affect the high-speed comparator in the ADC. Bypass
these supplies to the single-point analog ground with
0.1µF and 4.7µF bypass capacitors close to the
MAX192. Minimize capacitor lead lengths for best sup-
ply-noise rejection. If the +5V power supply is very
noisy, a 10resistor can be connected as a lowpass
filter, as shown in Figure 18.
High-Speed Digital Interfacing
The MAX192 can interface with QSPI at high through-
put rates using the circuit in Figure 19. This QSPI circuit
can be programmed to do a conversion on each of the
eight channels. The result is stored in memory without
taxing the CPU since QSPI incorporates its own
micro-sequencer.
Figure 20 details the code that sets up QSPI for
autonomous operation. In external clock mode, the
MAX192 performs a single-ended, unipolar conversion
on each of the eight analog input channels. Figure 21
shows the timing associated with the assembly code of
Figure 20. The first byte clocked into the MAX192 is the
control byte, which triggers the first conversion on CH0.
The last two bytes clocked into the MAX192 are all
zero, and clock out the results of the CH7 conversion.
MAX192
Low-Power, 8-Channel,
Serial 10-Bit ADC
______________________________________________________________________________________ 19
+5V
510k
100k
24k
0.01µF
12
REFADJ
MAX192
Figure 17. Reference-Adjust Circuit
+5V
GND
SUPPLIES
DGND+5VDGND
AGNDV
DD
DIGITAL
CIRCUITRY
MAX192
R* = 10
* OPTIONAL
Figure 18. Power-Supply Grounding Connection
MAX192
Low-Power, 8-Channel,
Serial 10-Bit ADC
20 ______________________________________________________________________________________
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
MAX192
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
AGND
SHDN
V
DD
SCLK
CS
DIN
SSTRB
DOUT
DGND
AGND
REFADJ
VREF
V
DDI
, V
DDE
, V
DDSYN
, V
STBY
SCK
PCS0
MOSI
MISO
* CLOCK CONNECTIONS NOT SHOWN
V
SSI
V
SSE
MC68HC16
0.1
µ
F 4.7
µ
F
0.01µF
0.1µF
4.7µF
ANALOG
INPUTS
+5V
+
Figure 19. MAX192 QSPI Connection
TMS320 to MAX192 Interface
Figure 22 shows an application circuit to interface the
MAX192 to the TMS320 in external clock mode. The
timing diagram for this interface circuit is shown in
Figure 23.
Use the following steps to initiate a conversion in the
MAX192 and to read the results:
1) The TMS320 should be configured with CLKX
(transmit clock) as an active-high output clock and
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR of the TMS320 are
tied together with the SCLK input of the MAX192.
2) The MAX192 CS is driven low by the XF_ I/O port
of the TMS320 to enable data to be clocked into
DIN of the MAX192.
3) An 8-bit word (1XXXXX11) should be written to the
MAX192 to initiate a conversion and place the
device into external clock mode. Refer to Table 3
to select the proper XXXXX bit values for your spe-
cific application.
4) The SSTRB output of the MAX192 is monitored via
the FSR input of the TMS320. A falling edge on the
SSTRB output indicates that the conversion is in
progress and data is ready to be received from
the MAX192.
5) The TMS320 reads in one data bit on each of the
next 16 rising edges of SCLK. These data bits rep-
resent the 10-bit conversion result and two sub-
LSBs, followed by four trailing bits, which should
be ignored.
6) Pull CS high to disable the MAX192 until the next
conversion is initiated.
MAX192
Low-Power, 8-Channel,
Serial 10-Bit ADC
______________________________________________________________________________________ 21
* Description :
* This is a shell program for using a stand-alone 68HC16 without any external memory. The internal 1K RAM
* is put into bank $0F to maintain 68HC11 code compatibility. This program was written with software
* provided in the Motorola 68HC16 Evaluation Kit.
*
* Roger J.A. Chen, Applications Engineer
* MAXIM Integrated Products
* November 20, 1992
*
******************************************************************************************************************************************************
INCLUDE ‘EQUATES.ASM’ ;Equates for common reg addrs
INCLUDE ‘ORG00000.ASM’ ;initialize reset vector
INCLUDE ‘ORG00008.ASM’ ;initialize interrupt vectors
ORG $0200 ;start program after interrupt vectors
INCLUDE ‘INITSYS.ASM’ ;set EK=F,XK=0,YK=0,ZK=0
;set sys clock at 16.78 MHz, COP off
INCLUDE ‘INITRAM.ASM’ ;turn on internal SRAM at $10000
;set stack (SK=1, SP=03FE)
MAIN:
JSR INITQSPI
MAINLOOP:
JSR READ192
WAIT:
LDAA SPSR
ANDA #$80
BEQ WAIT ;wait for QSPI to finish
BRA MAINLOOP
ENDPROGRAM:
INITQSPI:
;This routine sets up the QSPI microsequencer to operate on its own.
;The sequencer will read all eight channels of a MAX192 each time
;it is triggered. The A/D converter results will be left in the
;receive data RAM. Each 16 bit receive data RAM location will
;have a leading zero, 10 + 2 bits of conversion result and three zeros.
;
;Receive RAM Bits 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
;A/D Result 0 MSB LSB 0 0 0
***** Initialize the QSPI Registers ******
PSHA
PSHB
LDAA #%01111000
STAA QPDR ;idle state for PCS0-3 = high
LDAA #%01111011
STAA QPAR ;assign port D to be QSPI
LDAA #%01111110
STAA QDDR ;only MISO is an input
LDD #$8008
STD SPCR0 ;master mode,16 bits/transfer,
;CPOL=CPHA=0,1MHz Ser Clock
LDD #$0000
STD SPCR1 ;set delay between PCS0 and SCK,
;set delay between transfers
Figure 20. MAX192 Assembly-Code Listing

MAX192BCAP

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC Low-Power, 8-Channel, Serial 10-Bit ADC
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New from this manufacturer.
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