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MAX192BEPP+

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
Note 1: Tested at V
DD
= 5.0V; single-ended, unipolar.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: Grounded on-channel; sine wave applied to all off channels.
Note 4: Conversion time defined as the number of clock cycles times the clock period; clock has 50% duty cycle.
Note 5: Guaranteed by design. Not subject to production testing.
Note 6: The common-mode range for the analog inputs is from AGND to V
DD
.
Note 7: Sample tested to 0.1% AQL.
Note 8: External load should not change during conversion for specified accuracy.
Note 9: Measured at V
SUPPLY
+ 5% and V
SUPPLY
- 5% only.
MAX192
Low-Power, 8-Channel,
Serial 10-Bit ADC
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±5%, f
CLK
= 2.0MHz, external clock (50% duty cycle), 15 clocks/conversion cycle (133ksps), 4.7µF capacitor at VREF pin,
T
A
= T
MIN
to T
MAX,
unless otherwise noted. Typical values are at T
A
= +25°C.)
I
SINK
= 16mA
I
SINK
= 5mA
SHDN = open
SHDN = open
SHDN = 0V
SHDN = V
DD
(Note 5)
V
IN
= 0V or V
DD
CONDITIONS
V
0.3
V
OL
Output Voltage Low
0.4
nA-100 100
SHDN Max Allowed Leakage,
Mid Input
V2.75V
FLT
SHDN Voltage, Floating
V1.5 V
DD
- 1.5V
IM
SHDN Input Mid Voltage
µA-4.0I
INL
SHDN Input Current, Low
µA4.0I
INH
SHDN Input Current, High
V0.5V
INL
SHDN Input Low Voltage
VV
DD
- 0.5V
INH
SHDN Input High Voltage
pF15C
IN
DIN,SCLK, CS Input Capacitance
µA±1I
IN
DIN, SCLK, CS Input Leakage
V0.15V
HYST
DIN, SCLK, CS Input Hysteresis
V0.8V
INL
DIN,SCLK, CS Input Low Voltage
V2.4V
INH
DIN,SCLK, CS Input High Voltage
UNITSMIN TYP MAXSYMBOLPARAMETER
Output Voltage High V
OH
I
SOURCE
= 1mA 4 V
Three-State Leakage Current I
L
CS = 5V
±10 µA
Three-State Leakage Capacitance C
OUT
CS = 5V (Note 5)
15 pF
Positive Supply Voltage V
DD
5 ±5% V
Operating mode 1.5 2.5 mA
Fast power-down 30 70Positive Supply Current I
DD
Full power-down 2 10
µA
Positive Supply Rejection
(Note 9)
PSR
V
DD
= 5V ±5%; external reference, 4.096V;
full-scale input
±0.06 ±0.5 mV
EXTERNAL REFERENCE AT REFADJDIGITAL INPUTS (DIN, SCLK,
–
C
—
S
–
,
–
S
—
H
—
D
—
N
–
)
DIGITAL OUTPUTS (DOUT, SSTRB)
POWER REQUIREMENTS
Note 5: Guaranteed by design. Not subject to production testing.
MAX192
Low-Power, 8-Channel,
Serial 10-Bit ADC
_______________________________________________________________________________________ 5
TIMING CHARACTERISTICS
(V
DD
= 5V ±5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
C
LOAD
= 100pF
External clock mode only, C
LOAD
= 100pF
C
LOAD
= 100pF
C
LOAD
= 100pF
C
LOAD
= 100pF
External clock mode only, C
LOAD
= 100pF
CONDITIONS
ns200t
STR
CS Rise to SSTRB Output
Disable (Note 5)
CS Fall to SSTRB Output Enable
(Note 5)
ns200t
SDV
ns0t
DH
DIN to SCLK Hold
ns100t
DS
µs1.5t
AZ
Acquisition Time
DIN to SCLK Setup
ns200t
SSTRB
SCLK Fall to SSTRB
ns200t
CL
SCLK Pulse Width Low
ns200t
CH
SCLK Pulse Width High
ns0t
CSH
CS to SCLK Rise Hold
ns20 150t
DO
ns100t
DV
ns100t
TR
SCLK Fall to Output Data Valid
ns100t
CSS
CS to SCLK Rise Setup
UNITSMIN TYP MAXSYMBOLPARAMETER
SSTRB Rise to SCLK Rise
(Note 5)
t
SCK
Internal clock mode only 0 ns
CS Rise to Output Disable
CS Fall to Output Enable
__________________________________________Typical Operating Characteristics
0.16
0
-60 -20 60 140
CHANNEL-TO-CHANNEL OFFSET MATCHING
vs. TEMPERATURE
0.02
0.12
TEMPERATURE (°C)
OFFSET MATCHING (LSBs)
20 100
0.10
0.04
-40 0 40 80 120
0.14
0.08
0.06
0.30
-0.05
-60 140
POWER-SUPPLY REJECTION
vs. TEMPERATURE
0
0.25
TEMPERATURE (°C)
PSR (LSBs)
60
0.10
0.05
-40 20 100
0.15
0.20
-20 0 40 80 120
V
DD
= +5V ±5%
2.456
INTERNAL REFERENCE VOLTAGE
vs. TEMPERATURE
2.452
2.455
TEMPERATURE (°C)
VREFADJ (V)
2.454
2.453
-40 -20 0 20 40 60 80 100 120
-60 140
MAX192
Low-Power, 8-Channel,
Serial 10-Bit ADCs
6
________________________________________________________________________________________________
+5V
3k
C
LOAD
DGND
DOUT
C
LOAD
DGND
3k
DOUT
a) High-Z to V
OH
and V
OL
to V
OH
b) High-Z to V
OL
and V
OH
to V
OL
+3V
3k
C
LOAD
DGND
DOUT
C
LOAD
DGND
3k
DOUT
a) V
OH
to High-Z b) V
OL
to High-Z
Figure 1. Load Circuits for Enable Time
Figure 2. Load Circuits for Disabled Time
Pin Description
PIN NAME FUNCTION
1–8 CH0–CH7 Sampling Analog Inputs
9, 13 AGND
Analog Ground. Also IN- Input for single-enabled conversions. Connect both AGND pins to
analog ground.
10
SHDN
Three-Level Shutdown Input. Pulling SHDN low shuts the MAX192 down to 10µA (max) supply cur-
rent, otherwise the MAX192 is fully operational. Pulling SHDN high puts the reference-buffer amplifi-
er in internal compensation mode. Letting SHDN float puts the reference-buffer amplifier in external
compensation mode.
11 VREF
Reference Voltage for analog-to-digital conversion. Also, Output of the Reference Buffer Amplifier.
Add a 4.7µF capacitor to ground when using external compensation mode. Also functions as an
input when used with a precision external reference.
12 REFADJ Reference-Buffer Amplifier Input. To disable the reference-buffer amplifier, tie REFADJ to V
DD
.
14 DGND Digital Ground
15 DOUT
Serial Data Output. Data is clocked out at the falling edge of SCLK. High impedance when CS is
high.
16 SSTRB
Serial Strobe Output. In internal clock mode, SSTRB goes low when the MAX192 begins the A/D
conversion and goes high when the conversion is done. In external clock mode, SSTRB pulses high
for one clock period before the MSB decision. SSTRB is high impedance when CS is high
(external mode).
17 DIN Serial Data Input. Data is clocked in at the rising edge of SCLK.
18
CS
Active-Low Chip Select. Data will not be clocked into DIN unless CS is low. When CS is high, DOUT
is high impedance.
19 SCLK
Serial Clock Input. Clocks data in and out of serial interface. In external clock mode, SCLK also sets
the conversion speed. (Duty cycle must be 40% to 60% in external clock mode.)
20 V
DD
Positive Supply Voltage, +5V ±5%
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

MAX192BEPP+

Mfr. #:
Buy MAX192BEPP+
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 10-Bit 8Ch 133ksps 5V Precision ADC
Lifecycle:
New from this manufacturer.
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