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7025S15J

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
6.42
IDT7025S/L
High-Speed 8K x 16 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
7
NOTES:
1. 'X' in part number indicates power rating (S or L)
2. V
CC = 5V, TA = +25°C, and are not production tested. Icc dc = 120mA (TYP)
3. At f = f
MAX, address and I/O'S are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND to 3V.
4. f = 0 means no address or control lines change.
5. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
DC Electrical Characteristics Over the 0perating
Temperature and Supply Voltage Range
(1)
(VCC = 5.0V ± 10%)
7025X15
Com'l Only
7025X17
Com'l Only
7025X20
Com'l, Ind
& Military
7025X25
Com'l &
Military
Symbol Parameter Test Condition Version Typ.
(2)
Max. Typ.
(2)
Max. Typ.
(2)
Max. Typ.
(2)
Max.
Unit
I
CC
Dynamic Operating
Current
(Both Ports Active)
CE = V
IL
, Outputs Disabled
SEM = V
IH
f = f
MAX
(3)
COM'L S
L
170
170
310
260
170
170
310
260
160
160
290
240
155
155
265
220
mA
MIL &
IND
S
L
____
____
____
____
____
____
____
____
160
160
370
320
155
155
340
280
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
= CE
R
= V
IH
SEM
R
= SEM
L
= V
IH
f = f
MAX
(3)
COM'L S
L
20
20
60
50
20
20
60
50
20
20
60
50
16
16
60
50
mA
MIL &
IND
S
L
____
____
____
____
____
____
____
____
20
20
90
70
16
16
80
65
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE
"A"
= V
IL
and CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
(3)
SEM
R
= SEM
L
= V
IH
COM'L S
L
105
105
190
160
105
105
190
160
95
95
180
150
90
90
170
140
mA
MIL &
IND
S
L
____
____
____
____
____
____
____
____
95
95
240
210
90
90
215
180
I
SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
CE
L
and CE
R
> V
CC
- 0.2V,
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(4)
SEM
R
= SEM
L
> V
CC
- 0.2V
COM'L S
L
1.0
0.2
15
5
1.0
0.2
15
5
1.0
0.2
15
5
1.0
0.2
15
5
mA
MIL &
IND
S
L
____
____
____
____
____
____
____
____
1.0
0.2
30
10
1.0
0.2
30
10
I
SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
CC
- 0.2V
(5)
SEM
R
= SEM
L
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Active Port Outputs Disabled,
f = f
MAX
(3)
COM'L S
L
100
100
170
140
100
100
170
140
90
90
155
130
85
85
145
120
mA
MIL &
IND
S
L
____
____
____
____
____
____
____
____
90
90
225
200
85
85
200
170
2683 tbl 09a
7025X35
Com'l &
Military
7025X55
Com'l, Ind
& Military
7025X70
Military Only
Symbol Parameter Test Condition Version Typ.
(2)
Max. Typ.
(2)
Max. Typ.
(2)
Max. Unit
I
CC
Dynamic Operating
Current
(Both Ports Active)
CE = V
IL
, Outputs Disabled
SEM = V
IH
f = f
MAX
(3)
COM'L S
L
150
150
250
210
150
150
250
210
____
____
____
____
mA
MIL &
IND
S
L
150
150
300
250
150
150
300
250
140
140
300
250
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
= CE
R
= V
IH
SEM
R
= SEM
L
= V
IH
f = f
MAX
(3)
COM'L S
L
13
13
60
50
13
13
60
50
____
____
____
____
mA
MIL &
IND
S
L
13
13
80
65
13
13
80
65
10
10
80
65
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE
"A"
= V
IL
and CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
(3)
SEM
R
= SEM
L
= V
IH
COM'L S
L
85
85
155
130
85
85
155
130
____
____
____
____
mA
MIL &
IND
S
L
85
85
190
160
85
85
190
160
80
80
190
160
I
SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
CE
L
and CE
R
> V
CC
- 0.2V,
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(4)
SEM
R
= SEM
L
> V
CC
- 0.2V
COM'L S
L
1.0
0.2
15
5
1.0
0.2
15
5
____
____
____
____
mA
MIL &
IND
S
L
1.0
0.2
30
10
1.0
0.2
30
10
1.0
0.2
30
10
I
SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
CC
- 0.2V
(5)
SEM
R
= SEM
L
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Active Port Outputs Disabled,
f = f
MAX
(3)
COM'L S
L
80
80
135
110
80
80
135
110
____
____
____
____
mA
MIL &
IND
S
L
80
80
175
150
80
80
175
150
75
75
175
150
2683 tbl 09b
6.42
IDT7025S/L
High-Speed 8K x 16 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
8
Data Retention Waveform
Data Retention Characteristics Over All Temperature Ranges
(L Version Only)
NOTES:
1. T
A = +25°C, VCC = 2V, and are not production tested.
2. t
RC = Read Cycle Time
3. This parameter is guaranteed by device characterization, but is not production tested.
4. At Vcc
< 2.0V input leakages are undefined.
AC Test Conditions
Figure 1. AC Output Test Load
Figure 2. Output Test Load
(for t
LZ, tHZ, tWZ, tOW)
* including scope and jig.
Symbol Parameter Test Condition Min. Typ.
(1 )
Max. Unit
V
DR
V
CC
for Data Retention V
CC
= 2V 2.0
___ ___
V
I
CCDR
Data Retention Current
CE >
V
HC
V
IN
> V
HC
or < V
LC
MIL. & IND.
___
100 4000
µA
COM'L.
___
100 1500
t
CD R
(3 )
Chip Deselect to Data Retention Time
SEM > V
HC
0
___ ___
ns
t
R
(3 )
Operation Recovery Time t
RC
(2 )
___ ___
ns
2683 tbl 10
DATA RETENTION MODE
V
CC
CE
2683 drw 05
4.5V
t
CDR
t
R
V
IH
V
DR
V
IH
4.5V
V
DR
2V
≥
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns Max.
1.5V
1.5V
Figures 1 and 2
2683 tbl 11
2683 drw 06
893Ω
30pF
347Ω
5V
DATA
OUT
BUSY
INT
893Ω
5pF*
347Ω
5V
DATA
OUT
6.42
IDT7025S/L
High-Speed 8K x 16 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
9
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
(4)
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterazation, but is not production tested.
3. To access RAM, CE = V
IL, UB or LB = VIL, and SEM = VIH. To access semephore, CE = VIH or UB & LB = VIH, and SEM = VIL.
4. 'X' in part number indicates power rating (S or L).
7025X15
Com'l Only
7025X17
Com'l Only
7025X20
Com'l, Ind
& Military
7025X25
Com'l &
Military
UnitSymbol Parameter Min.Max.Min.Max.Min.Max.Min.Max.
READ CYCLE
t
RC Read Cycle Time 15
____
17
____
20
____
25
____
ns
t
AA Address Access Time
____
15
____
17
____
20
____
25 ns
t
ACE
Chip Enable Access Time
(3 )
____
15
____
17
____
20
____
25 ns
t
ABE
Byte Enable Access Time
(3 )
____
15
____
17
____
20
____
25 ns
t
AOE
Output Enable Access Time
(3 )
____
10
____
10
____
12
____
13 ns
t
OH Output Hold from Address Change 3
____
3
____
3
____
3
____
ns
t
LZ
Output Low-Z Time
(1,2)
3
____
3
____
3
____
3
____
ns
t
HZ
Output High-Z Time
(1,2)
____
10
____
10
____
12
____
15 ns
t
PU
Chip Enable to Power Up Time
(1,2)
0
____
0
____
0
____
0
____
ns
t
PD
Chip Disable to Power Down Time
(1,2)
____
15
____
17
____
20
____
25 ns
t
SOP Semaphore Flag Update Pulse (OE or SEM)10
____
10
____
10
____
10
____
ns
t
SAA
Semaphore Address Access
(3 )
____
15
____
17
____
20
____
25 ns
2683 tbl 12a
7025X35
Com'l &
Military
7025X55
Com'l, Ind
& Military
7025X70
Military Only
UnitSymbol Parameter Min.Max.Min.Max.Min.Max.
READ CYCLE
t
RC
Read Cycle Time 35
____
55
____
70
____
ns
t
AA
Address Access Time
____
35
____
55
____
70 ns
t
ACE
Chip Enable Access Time
(3 )
____
35
____
55
____
70 ns
t
ABE
Byte Enable Access Time
(3 )
____
35
____
55
____
70 ns
t
AOE
Output Enable Access Time
(3 )
____
20
____
30
____
35 ns
t
OH
Output Hold from Address Change 3
____
3
____
3
____
ns
t
LZ
Output Low-Z Time
(1,2)
3
____
3
____
3
____
ns
t
HZ
Output High-Z Time
(1,2)
____
15
____
25
____
30 ns
t
PU
Chip Enable to Power Up Time
(1,2)
0
____
0
____
0
____
ns
t
PD
Chip Disable to Power Down Time
(1,2)
____
35
____
50
____
50 ns
t
SOP
Semaphore Flag Update Pulse (OE or SEM)15
____
15
____
15
____
ns
t
SAA
Semaphore Address Access
(3 )
____
35
____
55
____
70 ns
2683 tbl 12b
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

7025S15J

Mfr. #:
Buy 7025S15J
Manufacturer:
IDT
Description:
SRAM 16K X 16 DUAL PORT
Lifecycle:
New from this manufacturer.
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