MAX809 Series, MAX810 Series
www.onsemi.com
9
APPLICATIONS INFORMATION
V
CC
Transient Rejection
The MAX809 provides accurate V
CC
monitoring and
reset timing during power−up, power−down, and
brownout/sag conditions, and rejects negative−going
transients (glitches) on the power supply line. Figure 16
shows the maximum transient duration vs. maximum
negative excursion (overdrive) for glitch rejection. Any
combination of duration and overdrive which lies under the
curve will not generate a reset signal. Combinations above
the curve are detected as a brownout or power−down.
Typically, transient that goes 100 mV below the reset
threshold and lasts 5.0 ms or less will not cause a reset pulse.
Transient immunity can be improved by adding a capacitor
in close proximity to the V
CC
pin of the MAX809.
Figure 16. Maximum Transient Duration vs.
Overdrive for Glitch Rejection at 25°C
Duration
V
TH
Overdrive
CC
10
250
200
11060
MAXIMUM TRANSIENT DURATION (
m
50
300
RESET COMPARATOR OVERDRIVE (mV)
0
41
V
TH
= 4.9 V
150
100
V
TH
= 1.2 V
160 210 260 310 360
V
TH
= 2.93 V
RESET Signal Integrity During Power−Down
The MAX809 RESET output is valid to V
CC
= 1.0 V.
Below this voltage the output becomes an “open circuit” and
does not sink current. This means CMOS logic inputs to the
Microprocessor will be floating at an undetermined voltage.
Most digital systems are completely shutdown well above
this voltage. However, in situations where RESET
must be
maintained valid to V
CC
= 0 V, a pull−down resistor must be
connected from RESET
to ground to discharge stray
capacitances and hold the output low (Figure 17). This
resistor value, though not critical, should be chosen such that
it does not appreciably load RESET
under normal operation
(100 kW will be suitable for most applications).
V
CC
V
CC
RESET
R1
100 k
MAX809/810
GND
Figure 17. Ensuring RESET Valid to V
CC
= 0 V
RESET
Processors With Bidirectional I/O Pins
Some Microprocessor’s have bidirectional reset pins.
Depending on the current drive capability of the processor
pin, an indeterminate logic level may result if there is a logic
conflict. This can be avoided by adding a 4.7 kW resistor in
series with the output of the MAX809 (Figure 18). If there
are other components in the system which require a reset
signal, they should be buffered so as not to load the reset line.
If the other components are required to follow the reset I/O
of the Microprocessor, the buffer should be connected as
shown with the solid line.
V
CC
V
CC
Microprocessor
RESET
MAX809/810
GND GND
4.7 k
Figure 18. Interfacing to Bidirectional Reset I/O
RESET
V
CC
BUFFERED RESET
TO OTHER SYSTEM
COMPONENTS
BUFFER
RESET
