MT8960/61/62/63/64/65/66/67 Data Sheet
25
Zarlink Semiconductor Inc.
Figure 12 - Variation of Gain With Input Level
+1.0
+0.5
+0.25
0
-0.25
-0.5
-1.0
-60 -55 -50 -40 -30 -20 -10
5a. CCITT Method 1
CCITT End-To-End Spec
Bandlimited White Noise Test Signal
+1.0
+0.5
+0.25
0
-0.25
-0.5
-1.0
-10 0 -3
Sinusiodal Test Signal
1
2
Channel Spec
Input Level
(dBm0)
+1.5
+1.0
+0.5
0
-0.25
-0.5
-1.0
-1.5
+0.25
-60 -50 -40 -30 -20 -10 0 +3
CCITT End-To-End Spec
1
2
Channel Spec
Input Level
(dBm0)
Sinusoidal Test Signal
5b. CCITT Method 2
Gain Variation (dB)
Gain Variation (dB)
MT8960/61/62/63/64/65/66/67 Data Sheet
26
Zarlink Semiconductor Inc.
Figure 13 - Signal to Total Distortion Ratio vs Input Level
40
30
20
10
0
-60 -55 -50 -34 -30 -27
-20 -10 -6 -3 0 +3
-40
14.3
12.6
29.3
27.6
33.9
32.2
35.6
33.9
26.3
28.0
Input Level (dBm0)
1
2
Channel Spec
CCITT End-To-End
Spec
6a. CCITT Method 1
40
30
20
10
0
-60 -50 -40 -30 -20 -10 0
24.3
25.4
30.4
36.4
36.4
29.3
35.3
35.3
22.0
27.0
33.0
33.0
1
2
Channel Spec
D/A
1
2
Channel Spec
A/D
CCITT
End-To-End
Spec
Input Level (dBm0)
6b. CCITT Method 2
Signal to Total Distortion Ratio (dB) Signal to Total Distortion Ratio (dB)
MT8960/61/62/63/64/65/66/67 Data Sheet
27
Zarlink Semiconductor Inc.
Figure 14 - Envelope Delay Variation Frequency
1000
750
500
370
250
125
0
500 1000 1500 2000 2500 3000
(600Hz)
(2800Hz)
(2600Hz)
CCITT
½ Channel Spec
Envelope Delay (µs)

MT8963AE1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Telecom Interface ICs Pb Free Filter Codec A-LAW 20 Pin
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union