10
LT1218/LT1219
TYPICAL PERFORMANCE CHARACTERISTICS
U
W
LT1218 Power Supply Rejection
Ratio vs Frequency
LT1218 Closed Loop Output
Impedance vs Frequency
LT1219 Closed Loop Output
Impedance vs Frequency
FREQUENCY (kHz)
1
POWER SUPPLY REJECTION RATIO (dB)
100
90
80
70
60
50
40
30
20
10
0
10 100 1000
LT1218/19 • TPC17
V
S
= ±2.5V
POSITIVE SUPPLY
NEGATIVE SUPPLY
FREQUENCY (kHz)
0.1
0.1
OUTPUT IMPEDANCE ()
10
1000
1 10 100 1000
LT1218/19 • TPC18
1.0
100
A
V
= 10
A
V
= 1
V
S
= ±2.5V
FREQUENCY (kHz)
0.1
0.1
OUTPUT IMPEDANCE ()
10
1000
1 10 100 1000
LT1218/19 • TPC19
1.0
100
V
S
= ±2.5V
C
L
= 0.1µF
A
V
= 10
A
V
= 1
LT1218 Capacitive Load Handling
LT1219 Overshoot vs Load
Current, V
S
= ±2.5V
LT1219 Overshoot vs Load
Current, V
S
= ±15V
LOAD CURRENT (mA)
–10
OVERSHOOT (%)
5
LT1218/19 • TPC21
–5 0 10
70
60
50
40
30
20
10
0
C
L
= 0.22µF
C
L
= 0.1µF
C
L
= 0.047µF
V
S
= ±2.5V
A
V
= 1
CAPACITIVE LOAD (pF)
OVERSHOOT (%)
80
70
60
50
40
30
20
10
0
10 1000 10000 100000
LT1218/19 • TPC20
100
A
V
= 1
A
V
= 5
A
V
= 10
V
S
= ±2.5V
Open-Loop Gain, V
S
= ±15V
THD + Noise vs Frequency
OUTPUT VOLTAGE (V)
–20
OFFSET VOLTAGE CHANGE (µV)
20
LT1218/19 • TPC23
–10
0
10
40
30
20
10
0
10
20
30
–40
–15
–5
5
15
R
L
= 10k
R
L
= 2k
V
S
= ±15V
FREQUENCY (kHz)
0.01
0.001
THD + NOISE (%)
0.01
0.1
1
0.1 1 10
LT1218/19 • TPC25
V
S
= ±1.5V
V
IN
= 2V
P-P
R
L
= 10k
A
V
= 1
A
V
= –1
Input Offset Drift vs Time
TIME AFTER POWER-UP (SEC)
CHANGE IN OFFSET VOLTAGE (µV)
40
30
20
10
0
10
20
30
–40
LT1218/19 • TPC24
0 20 40 60 80 100 120 140 180 200160
V
S
= ±15V
V
S
= ±2.5V
C
L
= 0.22µF
C
L
= 0.1µF
LOAD CURRENT (mA)
–10
OVERSHOOT (%)
5
LT1218/19 • TPC22
–5 0 10
70
60
50
40
30
20
10
0
C
L
= 0.047µF
V
S
= ±15V
A
V
= 1
11
LT1218/LT1219
TYPICAL PERFORMANCE CHARACTERISTICS
U
W
THD + Noise vs
Peak-to-Peak Voltage
Large-Signal Response
V
S
= ±15V
INPUT VOLTAGE (PEAK-TO-PEAK)
THD + NOISE (%)
10
1
0.1
0.01
0.001
02435
LT1218/19 • TPC26
1
V
S
= ±1.5V
A
V
= 1
V
S
= ±2.5V
A
V
= 1
V
S
= ±2.5V
A
V
= –1
V
S
= ±1.5V
A
V
= –1
f = 1kHz
R
L
= 10k
(ALL CURVES)
Small-Signal Response
V
S
= ±15V
A
V
= 1
V
S
= ±15V
LT1218/18 • TPC27
A
V
= 1
V
S
= ±15V
LT1218/18 • TPC28
APPLICATIONS INFORMATION
WUU
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Rail-to-Rail Operation
The LT1218/LT1219 differ from conventional op amps in
the design of both the input and output stages. Figure 1
shows a simplified schematic of the amplifier. The input
stage consists of two differential amplifiers, a PNP stage
Q1/Q2 and an NPN stage Q3/Q4, which are active over
different portions of the input common mode range.
Lateral devices are used in both input stages, eliminating
the need for clamps across the input pins. Each input stage
is trimmed for offset voltage. A complementary output
configuration (Q23 through Q26) is employed to create an
Q24
D7
Q23
Q25
V
V
V
V
+
V
+
V
+
V
+
V
C1
C2
Q26
D8
Q22
Q21
D6
Q17
Q16
Q18
Q15
Q19
Q20
D5D4
D7
Q11
I1
Q10
Q14
C
C
Q13
Q9
Q8
Q7
D2
Q1 Q2
Q5
D1
Q3 Q4
Q6
D3
Q12
OUT
V
+
– 300mV
V
+
V
IN
+
IN
LT1218/19 • F01
TRIM
SHDN
BIAS
CONTROL
Figure 1. LT1218 Simplified Schematic Diagram
12
LT1218/LT1219
APPLICATIONS INFORMATION
WUU
U
output stage with rail-to-rail swing. The amplifier is fabri-
cated on Linear Technology’s proprietary complementary
bipolar process, which ensures very similar DC and AC
characteristics for the output devices Q24 and Q26.
A simple comparator Q5 steers current from current
source I
1
between the two input stages. When the input
common mode voltage V
CM
is near the negative supply,
Q5 is reverse biased, and I
1
becomes the tail current for the
PNP differential pair Q1/Q2. At the other extreme, when
V
CM
is within about 1.3V from the positive supply, Q5
diverts I
1
to the current mirror D3/Q6, which furnishes the
tail current for the NPN differential pair Q3/Q4.
The collector currents of the two input pairs are combined
in the second stage, consisting of Q7 through Q11. Most
of the voltage gain in the amplifier is contained in this
stage. Differential amplifier Q14/Q15 buffers the output of
the second stage, converting the output voltage to differ-
ential currents. The differential currents pass through
current mirrors D4/Q17 and D5/Q16, and are converted to
differential voltages by Q18 and Q19. These voltages are
also buffered and applied to the output Darlington pairs
Q23/Q24 and Q25/Q26. Capacitors C1 and C2 form local
feedback loops around the output devices, lowering the
output impedance at high frequencies.
Input Offset Voltage
Since the amplifier has two input stages, the input offset
voltage changes depending upon which stage is active.
The input offsets are random, but bounded voltages.
When the amplifier switches between stages, offset volt-
ages may go up, down or remain flat; but will not exceed
the guaranteed limits. This behavior is illustrated in three
distribution plots of input offset voltage in the Typical
Performance Characteristics section.
Overdrive Protection
Two circuits prevent the output from reversing polarity
when the input voltage exceeds the common mode range.
When the noninverting input exceeds the positive supply
by approximately 300mV, the clamp transistor Q12 (Fig-
ure 1) turns on, pulling the output of the second stage low,
which forces the output high. For input below the negative
supply, diodes D1 and D2 turn on, overcoming the satu-
ration of the input pair Q1/Q2.
When overdriven, the amplifier draws input current that
exceeds the normal input bias current. Figures 2 and 3
show typical input current as a function of input voltage.
The input current must be less than 10mA for the phase
reversal protection to work properly. When the amplifier is
severely overdriven, an external resistor should be used to
limit the overdrive current.
COMMON MODE VOLTAGE RELATIVE TO
NEGATIVE SUPPLY (mV)
800
–110
INPUT BIAS CURRENT (nA)
–90
–70
–50
–30
600 400
LT1218/19 • F03
200
–10
0
–20
–40
–60
–80
–100
V
S
200
T = –55°C T = 25°C
T = 85°C
+
T = 70°C
MEASURED AS A FOLLOWER
Figure 3. Input Bias Current vs Common Mode Voltage
COMMON MODE VOLTAGE RELATIVE TO
POSITIVE SUPPLY (mV)
500
0
INPUT BIAS CURRENT (nA)
20
40
60
80
300 –100 V
S
LT1218/19 • F02
100
100
110
90
70
50
30
10
300 500
T = –55°C
T = 25°C
T = 85°C
T = 70°C
MEASURED AS A 
FOLLOWER
+
Figure 2. Input Bias Current vs Common Mode Voltage

LT1219CS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers Single Prec R-to-R I/O C-Load
Lifecycle:
New from this manufacturer.
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