CBTD3861 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 21 November 2011 7 of 16
NXP Semiconductors
CBTD3861
10-bit level shifting bus switch with output enable
10. Dynamic characteristics
[1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2] t
pd
is the same as t
PLH
and t
PHL
.
t
en
is the same as t
PZL
and t
PZH
.
t
dis
is the same as t
PLZ
and t
PHZ
.
11. Waveforms
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 12.
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Typ Max
t
pd
propagation delay An, Bn to Bn, An; see Figure 10
[1][2]
V
CC
= 5.0 V 0.5 V - - 0.25 ns
t
en
enable time OE to An or Bn; see Figure 11
[2]
V
CC
= 5.0 V 0.5 V 1.8 4.3 10.0 ns
t
dis
disable time OE to An or Bn; see Figure 11
[2]
V
CC
= 5.0 V 0.5 V 1.0 3.0 6.0 ns
Measurement points are given in Table 8.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 10. The data input (An, Bn) to output (Bn, An) propagation delay times
001aam475
An, Bn input
Bn, An output
GND
V
OH
V
M
t
PLH
t
PHL
V
M
V
OL
V
I
