© Semiconductor Components Industries, LLC, 2011
September, 2011 − Rev. 10
1 Publication Order Number:
2N5060/D
2N5060 Series
Sensitive Gate
Silicon Controlled Rectifiers
Reverse Blocking Thyristors
Annular PNPN devices designed for high volume consumer
applications such as relay and lamp drivers, small motor controls, gate
drivers for larger thyristors, and sensing and detection circuits.
Supplied in an inexpensive plastic TO−92/TO-226AA package which
is readily adaptable for use in automatic insertion equipment.
Features
• Sensitive Gate Trigger Current − 200 mA Maximum
• Low Reverse and Forward Blocking Current − 50 mA Maximum,
T
C
= 110°C
• Low Holding Current − 5 mA Maximum
• Passivated Surface for Reliability and Uniformity
• These are Pb−Free Devices
MAXIMUM RATINGS (T
J
= 25°C unless otherwise noted)
Rating
Symbol Value Unit
Peak Repetitive Off−State Voltage (Note 1)
(T
J
= *40 to 110°C, Sine Wave,
50 to 60 Hz, R
GK
= 1 kW) 2N5060
2N5061
2N5062
2N5064
V
DRM,
V
RRM
30
60
100
200
V
On-State Current RMS (180° Conduction
Angles; T
C
= 80°C)
I
T(RMS)
0.8 A
*Average On-State Current
(180° Conduction Angles)
(T
C
= 67°C)
(T
C
= 102°C)
I
T(AV)
0.51
0.255
A
*Peak Non-repetitive Surge Current,
T
A
= 25°C (1/2 cycle, Sine Wave, 60 Hz)
I
TSM
10 A
Circuit Fusing Considerations (t = 8.3 ms) I
2
t 0.4 A
2
s
*Average On-State Current
(180° Conduction Angles) (T
C
= 67°C)
(T
C
= 102°C)
I
T(AV)
0.51
0.255
A
*Forward Peak Gate Power (Pulse Width v
1.0 msec; T
A
= 25°C)
P
GM
0.1 W
*Forward Average Gate Power
(T
A
= 25°C, t = 8.3 ms)
P
G(AV)
0.01 W
*Forward Peak Gate Current (Pulse Width
v 1.0 msec; T
A
= 25°C)
I
GM
1.0 A
*Reverse Peak Gate Voltage (Pulse Width
v 1.0 msec; T
A
= 25°C)
V
RGM
5.0 V
*Operating Junction Temperature Range T
J
−40 to
+110
°C
*Storage Temperature Range T
stg
−40 to
+150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. V
DRM
and V
RRM
for all types can be applied on a continuous basis. Ratings
apply for zero or negative gate voltage; however, positive gate voltage shall
not be applied concurrent with negative potential on the anode. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
*Indicates JEDEC Registered Data.
SILICON CONTROLLED
RECTIFIERS
0.8 A RMS, 30 − 200 V
K
G
A
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
TO−92
CASE 29
STYLE 10
50xx Specific Device Code
Y = Year
WW = Work Week
MARKING
DIAGRAM
2N
50xx
YWW
PIN ASSIGNMENT
1
2
3
Gate
Anode
Cathode
http://onsemi.com
1
2
3
