7
LTC3423/LTC3424
34234f
APPLICATIO S I FOR ATIO
WUUU
Zero Current Amp. The zero current amplifier monitors the
inductor current to the output and shuts off the synchro-
nous rectifier once the current is below 50mA, preventing
negative inductor current.
Burst Mode Operation
Burst Mode operation is when the IC delivers energy to the
output until it is regulated and then goes into a sleep mode
where the outputs are off and the IC is consuming only
38µA. In this mode, the output ripple has a variable
frequency component with load current and the steady
state ripple will be typically below 3%.
During the period where the device is delivering energy to
the output, the peak current will be equal to 400mA and the
inductor current will terminate at zero current for each cycle.
In this mode the maximum output current is given by:
I
V
V
Amps
OUT MAXBURST
IN
OUT
()
•
≈
6
Burst Mode operation is user controlled by driving the
MODE/SYNC pin high to enable and low to disable. It is
recommended that Burst Mode operation be entered after
the part has started up.
COMPONENT SELECTION
Inductor Selection
The high frequency operation of the LTC3423/LTC3424
allows the use of small surface mount inductors. The
minimum inductance value is proportional to the operat-
ing frequency and is limited by the following constraints:
L
k
f
H and L
VV V
f Ripple V
H
IN MIN OUT MAX IN MIN
OUT MAX
>µ >
()
() ( ) ()
()
•–
••
where
k = 3 for LTC3423, 2 for LTC3424
f = Operating Frequency (Hz)
Ripple = Allowable Inductor Current Ripple (A)
V
IN(MIN)
= Minimum Input Voltage (V)
V
OUT(MAX)
= Maximum Output Voltage (V)
DETAILED DESCRIPTION
The LTC3423/LTC3424 provides high efficiency, low noise
power for applications such as portable instrumentation
and are ideal for applications that require an output voltage
between 1.5V and 2.6V from a single cell. These products
are an addition to the LTC3401 and LTC3402 family of
synchronous boost converters, with the differences being
the omission of the power good function (PGOOD) and the
addition of a V
DD
input to provide internal power. The IC
will not start up until the applied voltage on the V
DD
pin is
above 2.7V.
The current mode architecture with adaptive slope
compensation provides ease of loop compensation with
excellent transient load response. The low R
DS(ON)
, low
gate charge synchronous switches provides the pulse
width modulation control at high efficiency.
Low Noise Fixed Frequency Operation
Oscillator. The frequency of operation is set through a
resistor from the R
t
pin to ground where f = 3 • 10
10
/R
t
. An
internally trimmed timing capacitor resides inside the IC.
The oscillator can be synchronized with an external clock
inserted on the MODE/SYNC pin. When synchronizing the
oscillator, the free running frequency must be set to
approximately 30% lower than the desired synchronized
frequency. Keeping the sync pulse width below 2µs will
ensure that Burst Mode operation is disabled.
Current Sensing. Lossless current sensing converts the
peak current signal to a voltage to sum in with the internal
slope compensation. This summed signal is compared to
the error amplifier output to provide a peak current control
command for the PWM. The slope compensation in the IC
is adaptive to the input and output voltage. Therefore, the
converter provides the proper amount of slope compensa-
tion to ensure stability and not an excess causing a loss of
phase margin in the converter.
Error Amp. The error amplifier is a transconductance
amplifier with g
m
= 85µmhos. A simple compensation
network is placed from the V
C
pin to ground.
Current Limit. The current limit amplifier will shut the
NMOS switch off once the current exceeds its threshold.
The current amplifier delay to output is typically 50ns.
