5-OUTPUT 1.5V PCIE GEN1-2-3 FANOUT BUFFER WITH ZO=100OHMS 16 MARCH 9, 2017
9DBU0541 DATASHEET
Ordering Information
“LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant.
“A” is the device revision designator (will not correlate with the datasheet revision).
Revision History
Part / Order Number Shipping Packaging Package Temperature
9DBU0541AKLF Trays 32-pin VFQFPN 0 to +70° C
9DBU0541AKLFT Tape and Reel 32-pin VFQFPN 0 to +70° C
9DBU0541AKILF Trays 32-pin VFQFPN -40 to +85° C
9DBU0541AKILFT Tape and Reel 32-pin VFQFPN -40 to +85° C
Rev. Initiator Issue Date Description Page #
A RDW 7/15/2014 Final update and release - front page and electrical tables. Various
B RDW 7/24/2014
1. Removed VDDIO reference in the Electrical Characteristics -
Input/Supply/Common Parameters and Absolute Maximum Ratings
tables. This power rail does not exist on this device. The pinout and the
pin descriptions are correct.
6
C RDW 9/19/2014
Updated SMBus Input High/Low parameters conditions, MAX values,
and footnotes.
6
D RDW 4/22/2015
1. Updated Key Specifications to be consistent across the family.
2. Updated pin out and pin descriptions to show ePad on package
connected to ground.
3. Updated Clock Input Parameters table to be consistent with PCIe
Vswing parameter.
4. Add note about epad to Power Connections table.
1-3,5
E RDW 2/16/2017
1. Updated pins 21 and 20 from VDDA1.5/GNDA to VDDO1.5/GND to
clearly indicate that this part has no PLL.
2, 3
F RDW 3/9/2017
1. Removed "Bypass Mode" reference in "Output Duty Cycle..." and
"Phase Jitter Parameters" tables; update note 3 under Output Duty Cycle
table.
2. Corrected spelling errors/typos.
3. Change VDDA to VDDO1.5 in Current Consumption table.
4. Update Additive Phase Jitter conditions for PCIe Gen3.
7, 8
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9DBU0541 MARCH 9, 2017 17 ©2017 Integrated Device Technology, Inc.

9DBU0541AKILF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer 2 O/P 1.5V PCIE 34mW GEN1-2-3 Ind 100ohm
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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