74F251ASJ Datasheet 74F251ASC, 74F251ASJX, 74F251APC | P1-P3

April 1988

Revised September 2000

74F251A 8-Input Multiplexer with 3-STATE Outputs

74F251A

8-Input Multiplexer with 3-STATE Outputs

General Description

The 74F251A is a high-speed 8-input digital multiplexer. It

provides, in one package, the ability to select one bit of

data from up to eight sources. It can be used as a universal

function generator to generate any logic function of four

variables. Both assertion and negation outputs are pro-

vided.

Features

■ Multifunctional capability

■ On-chip select logic decoding

■ Inverting and non-inverting 3-STATE outputs

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

IEEE/IEC

Connection Diagram

Order Number Package Number Package Description

74F251ASC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

74F251ASJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74F251APC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

www.fairchildsemi.com 2

74F251A

Unit Loading/Fan Out

Functional Description

This device is a logical implementation of a single-pole, 8-

position switch with the switch position controlled by the

state of three Select inputs, S

0

, S

1

, S

2

. Both assertion and

negation outputs are provided. The Output Enable input

(OE

) is active LOW. When it is activated, the logic function

provided at the output is:

Z

= OE •(I

0

•S

0

•S

1

•S

2

+ I

1

•S

0

•S

1

•S

2

+

I

2

•S

0

•S

1

•S

2

+ I

3

•S

0

•S

1

•S

2

+

I

4

•S

0

•S

1

•S

2

+ I

5

•S

0

•S

1

•S

2

+

I

6

•S

0

•S

1

•S

2

+ I

7

•S

0

•S

1

•S

2

)

When the Output Enable is HIGH, both outputs are in the

high impedance (High Z) state. This feature allows multi-

plexer expansion by tying the outputs of up to 128 devices

together. When the outputs of the 3-STATE devices are

tied together, all but one device must be in the high imped-

ance state to avoid high currents that would exceed the

maximum ratings. The Output Enable signals should be

designed to ensure there is no overlap in the active LOW

portion of the enable voltages.

Truth Table

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Z = High Impedance

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Pin Names Description

U.L.

Input I

IH

/I

IL

HIGH/LOW

Output I

OH

/I

OL

S

0

–S

2

Select Inputs 1.0/1.0 20 µA/−0.6 mA

OE

3-STATE Output Enable Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA

I

0

–I

7

Multiplexer Inputs 1.0/1.0 20 µA/−0.6 mA

Z 3-STATE Multiplexer Output 150/40 (33.3)

−3 mA/24 mA (20 mA)

Z

Complementary 3-STATE Multiplexer Output 150/40 (33.3) −3 mA/24 mA (20 mA)

Inputs Outputs

OE

S

2

S

1

S

0

Z Z

HXXXZZ

LLLLI

0

I

0

LLLHI

1

I

1

LLHLI

2

I

2

LLHHI

3

I

3

LHLLI

4

I

4

LHLHI

5

I

5

LHHLI

6

I

6

LHHHI

7

I

7

3 www.fairchildsemi.com

74F251A

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: Absolute maximum ratings are values beyond which the device

may be damaged or have its useful life impaired. Functional operation

under these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

DC Electrical Characteristics

Storage Temperature −65°C to +150°C

Ambient Temperature under Bias

−55°C to +125°C

Junction Temperature under Bias

−55°C to +150°C

V

CC

Pin Potential to Ground Pin −0.5V to +7.0V

Input Voltage (Note 2)

−0.5V to +7.0V

Input Current (Note 2)

−30 mA to +5.0 mA

Voltage Applied to Output

in HIGH State (with V

CC

= 0V)

Standard Output

−0.5V to V

CC

3-STATE Output −0.5V to +5.5V

Current Applied to Output

in LOW State (Max) twice the rated I

OL

(mA)

Free Air Ambient Temperature 0

°C to +70°C

Supply Voltage

+4.5V to +5.5V

Symbol Parameter Min Typ Max Units

V

CC

Conditions

V

IH

Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

V

IL

Input LOW Voltage 0.8 V Recognized as a LOW Signal

V

CD

Input Clamp Diode Voltage −1.2 V Min I

IN

= −18 mA

V

OH

Output HIGH 10% V

CC

2.5

VMin

I

OH

= −1 mA

Voltage 10% V

CC

2.4 I

OH

= −3 mA

5% V

CC

2.7 I

OH

= −1 mA

5% V

CC

2.7 I

OH

= −3 mA

V

OL

Output LOW Voltage 10% V

CC

0.5 V Min I

OL

= 24 mA

I

IH

Input HIGH

5.0 µAMaxV

IN

= 2.7V

Current

I

BVI

Input HIGH Current

7.0 µAMaxV

IN

= 7.0V

Breakdown Test

I

CEX

Output HIGH

50 µAMaxV

OUT

= V

CC

Leakage Current

V

ID

Input Leakage

4.75 V 0.0

I

ID

= 1.9 µA

Test All Other Pins Grounded

I

OD

Output Leakage

3.75 µA0.0

V

IOD

= 150 mV

Circuit Current All Other Pins Grounded

I

IL

Input LOW Current −0.6 mA Max V

IN

= 0.5V

I

OZH

Output Leakage Current 50 µAMaxV

OUT

= 2.7V

I

OZL

Output Leakage Current −50 µAMaxV

OUT

= 0.5V

I

OS

Output Short-Circuit Current −60 −150 mA Max V

OUT

= 0V

I

ZZ

Bus Drainage Test 500 µA0.0VV

OUT

= 5.25V

I

CCL

Power Supply Current 15 22 mA Max V

O

= LOW

I

CCZ

Power Supply Current 16 24 mA Max V

O

= HIGH Z

74F251ASJ

74F251ASJ

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