LTC4263-1
7
42631fa
Detect and Turn-On Timing Current Limit Timing
DC Disconnect Timing AC Disconnect Timing
TEST TIMING
V
DD48
V
OUT
PD
INSERTED
PORT
TURN-ON
42631 TT01
t
DETDLY
t
DET
t
PON
I
LIM
V
DD48
I
CUT
I
OUT
V
OUT
V
SS
42631 TT02
t
OVLD
I
MIN
t
MPDO
t
MPS
I
OUT
42631 TT03
V
DD48
V
OUT
V
SS
I
ACOUT
t
MPDO
V
OSC
I
ACDMIN
PD REMOVED
42631 TT04
V
DD48
V
OUT
V
SS
LTC4263-1
8
42631fa
PIN FUNCTIONS
LED (Pin 1): Port State LED Drive. This pin is an open-
drain output that pulls down when the port is powered.
Under port fault conditions, the LED will fl ash in patterns
to indicate the nature of the port fault. See the Applications
Information section for a description of these patterns.
When the LTC4263-1 is operated from a single 48V sup-
ply, this pin is pulsed low with a 6% duty cycle during
the periods when the LED should be on. This allows use
of a simple inductor, diode, and resistor circuit to avoid
excess heating due to the large voltage drop from V
DD48
.
See the Applications Information section for details on
this circuit.
LEGACY (Pin 2): Legacy Detect. This pin controls whether
legacy detect is enabled. If held at V
DD5
, legacy detect is
enabled and testing for a large capacitor is performed to
detect the presence of a legacy PD on the port. See the
Applications Information section for descriptions of legacy
PDs that can be detected. If held at V
SS
, only IEEE 802.3af
compliant PDs are detected. If left fl oating, the LTC4263-1
enters force-power-on mode and any PD that generates
between 1V and 10V when biased with 270μA of detection
current will be powered as a legacy device. This mode is
useful if the system uses a differential detection scheme
to detect legacy devices.
MIDSPAN (Pin 3): Midspan Enable. If this pin is connected
to V
DD5
, Midspan backoff is enabled and a 3.2 second
delay occurs after every failed detect cycle unless the
result is open circuit. If held at V
SS
, no delay occurs after
failed detect cycles.
V
SS
(Pins 4, 5, 6, 13): Negative Power Supply. Pins 4, 5,
6 and 13 should be tied together on the PCB. For optimum
power delivery, supply voltage should be maximized. See
Applications Information section for more information.
OSC (Pin 7) Oscillator for AC Disconnect. If AC discon-
nect is used, connect a 0.1μF X7R capacitor from OSC to
V
SS
. Tie OSC to V
SS
to disable AC disconnect and enable
DC disconnect.
ACOUT (Pin 8): AC Disconnect Sense. Senses the port
to determine whether a PD is still connected when in AC
disconnect mode. If port capacitance drops below about
0.15μF for longer than T
MPDO
the port is turned off. If
AC disconnect is used, connect this pin to the port with
a series combination of a 1k resistor and a 0.47μF 100V
X7R capacitor. See the Applications Information section
for more information.
OUT (Pins 9, 10): Port Output. If DC disconnect is used,
these pins are connected to the port. If AC disconnect is
used, these pins are connected to the port through a parallel
combination of a 1A diode and a 500k resistor. Pins 9 and
10 should be tied together on the PCB. See the Applications
Information section for more information.
V
DD48
(Pin 11): Power Return for V
SS
. Must be bypassed
with a 0.1μF capacitor to V
SS
. For optimum power delivery,
supply voltage should be maximized. See Applications
Information section for more information.
SD (Pin 12): Shutdown. If held low, the LTC4263-1 is
prevented from performing detection or powering the port.
Pulling SD low will turn off the port if it is powered. When
released, a 4-second delay will occur before detection is
attempted. If not used, tie to V
DD5
.
V
DD5
(Pin 14): Logic Power Supply. Apply 5V referenced
to V
SS
, if such a supply is available, or place a 0.1μF
bypass capacitor to V
SS
to enable the internal regulator.
When the internal regulator is used, this pin should only
be connected to the bypass capacitor and to any logic pins
of the LTC4263-1 that are being held at V
DD5
.
Exposed Pad (Pin 15): V
SS
. Must be connected to V
SS
on the PCB. The Exposed Pad acts as a heat sink for the
internal MOSFET.
LTC4263-1
9
42631fa
BLOCK DIAGRAM
I
DET
SD
12
LEGACY
SMAJ58A
TO PORT
MAGNETICS
2
MIDSPAN
3
V
DD48
11
5V REG
500k
500k
1k
0.47μF
0.1μF
CONTROL
Hot Swap
TM
V
DD5
14
R
LED
LED
1
0.1μF
BOLD LINES INDICATE HIGH CURRENT
Hot Swap IS A TRADEMARK OF LINEAR TECHNOLOGY CORPORATION
V
SS
6
OSC
7
OUT
10
5
4
13
9
ACOUT
8
+
56V
+
5V
42631 BD
1A
V
DD5
INT5 EXT5
3

LTC4263CDE-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN IEEE 802.3af Single PSE Controller
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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