DTC114TE
NPN Digital Transistor
Features
x Built-in bias resistors enable the configuration of an inverter circuit
without connecting external input resistors (see equivalent circuit)
x The bias resistors consist of thin-film resistors with complete
isolation to allow negative biasing of the input. They also have the
advantage of almost completely eliminating parasitic effects
x
Only the on/off conditions need to be set for operation, making
device design easy
Absolute Maximum Ratings
Parameter Symbol Value Unit
Collector-Base Voltage V
CBO
50 V
Collector-Emitter Voltage V
CEO
50 V
Emitter-Base voltage V
EBO
5 V
Collector Current-Continuous I
C
100 mA
Collector Dissipation P
C
150 mW
Junction Temperature T
J
150
к
Storage Temperature Range T
STG
-55~150
к
Electrical Characteristics
Sym Parameter Min Typ Max Unit
V
(BR)CBO
Collector-Base Breakdown Voltage
(I
C
=50uA, I
E
=0)
50 --- --- V
V
(BR)CEO
Collector-Emitter Breakdown Voltage
(I
C
=1mA, I
B
=0)
50 --- --- V
V
(BR)EBO
Emitter-Base Breakdown Voltage
(I
E
=50uA, I
C
=0)
5 --- --- V
I
CBO
Collector Cut-off Current
(V
CB
=50V, I
E
=0)
--- --- 0.5 uA
I
EBO
Emitter Cut-off Current
(V
EB
=4V, I
C
=0)
h
FE
DC Current Gain
(V
CE
=5V, I
C
=1mA)
100 300 600 ---
V
CE(sat)
Collector-Emitter Saturation Voltage
(I
C
=10mA, I
B
=1mA)
--- --- 0.3 V
R
1
Input Resistor 7 10 13
K¡
f
T
Transition Frequency
(V
CE
=10V, I
C
=-5mA, f=100MHz)
--- 250 --- MHz
INCHES MM
DIM MIN MAX MIN MAX NOTE
A .059 .067 1.50 1.70
B .030 .033 0.75 0.85
C .057 .069 1.45 1.75
D .020 Nominal 0.50Nominal
E .035 .043 0.90 1.10
G .000 .004 .000 .100
H .028 .031 .70 0.80
J .004 .008 .100 .200
K .010 .014 .25 .35
A
C
B
D
E
G
H
DIMENSIONS
K
1
2
1. Base
2. Emitter
3. Collector
Revision: B 2013/01/01
--- --- 0.5 uA
SOT-523
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