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NLVVHC1G14DFT1G

P1-P3P4-P6
© Semiconductor Components Industries, LLC, 2013
June, 2017 − Rev. 20
1 Publication Order Number:
MC74VHC1G14/D
MC74VHC1G14
Single Schmitt-Trigger
Inverter
The MC74VHC1G14 is a single gate CMOS Schmitt−trigger
inverter fabricated with silicon gate CMOS technology.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The MC74VHC1G14 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G14 to be used to interface 5 V circuits to 3 V
circuits.
The MC74VHC1G14 can be used to enhance noise immunity or to
square up slowly changing waveforms.
Features
• High Speed: t
PD
= 4 ns (Typ) at V
CC
= 5 V
• Low Power Dissipation: I
CC
= 1.0 mA (Max) at T
A
= 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 101
• These Devices are Pb−Free and are RoHS Compliant
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
Figure 1. Pinout (Top View)
V
CC
NC
IN A
OUT Y
GND
IN A
OUT Y
Figure 2. Logic Symbol
1
2
3
4
5
1
www.onsemi.com
MARKING
DIAGRAMS
FUNCTION TABLE
L
H
A Input Y Output
H
L
PIN ASSIGNMENT
1
2
3 GND
NC
IN A
4
5V
CC
OUT Y
See detailed ordering and shipping information on page 4 of
this data sheet.
ORDERING INFORMATION
VA = Device Code
M = Date Code*
G = Pb−Free Package
VA M G
G
1
5
VA M G
G
M
1
5
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
TSOP−5 / SOT−23 / SC−59
DT SUFFIX
CASE 483
SC−88A / SOT−353 / SC−70
DF SUFFIX
CASE 419A
1
5
MC74VHC1G14
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2
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage −0.5 to )7.0 V
V
IN
DC Input Voltage −0.5 to +7.0 V
V
OUT
DC Output Voltage −0.5 to V
CC
)0.5 V
I
IK
DC Input Diode Current −20 mA
I
OK
DC Output Diode Current $20 mA
I
OUT
DC Output Sink Current $12.5 mA
I
CC
DC Supply Current per Supply Pin $25 mA
T
STG
Storage Temperature Range *65 to )150 °C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds 260 °C
T
J
Junction Temperature Under Bias )150 °C
q
JA
Thermal Resistance SC70−5/SC−88A (Note 1)
TSOP−5
350
230
°C/W
P
D
Power Dissipation in Still Air at 85°CSC70−5/SC−88A
TSOP−5
150
200
mW
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
u2000
u200
N/A
V
I
Latchup
Latchup Performance Above V
CC
and Below GND at 125°C (Note 5) $500 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage 2.0 5.5 V
V
IN
DC Input Voltage 0.0 5.5 V
V
OUT
DC Output Voltage 0.0 V
CC
V
T
A
Operating Temperature Range *55 )125 °C
t
r
, t
f
Input Rise and Fall Time V
CC
= 3.3 V ± 0.3 V
V
CC
= 5.0 V ± 0.5 V
−
−
No Limit
No Limit
ns/V
Device Junction Temperature versus
Time to 0.1% Bond Failures
Junction
Temperature °C
Time, Hours Time, Years
80 1,032,200 117.8
90 419,300 47.9
100 178,700 20.4
110 79,600 9.4
120 37,000 4.2
130 17,800 2.0
140 8,900 1.0
1
1 10 100
1000
TIME, YEARS
NORMALIZED FAILURE RATE
T
J
= 80
C°
T
J
= 90
C°
T
J
= 100 C°
T
J
= 110 C°
T
J
= 130 C°
T
J
= 120 C°
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Figure 3. Failure Rate vs. Time Junction Temperature
MC74VHC1G14
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3
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions
V
CC
(V)
T
A
= 25°C T
A
≤ 85°C −55 ≤ T
A
≤ 125°C
Unit
Min Typ Max Min Max Min Max
V
T+
Positive Threshold
Voltage
3.0
4.5
5.5
1.2
1.75
2.15
2.0
3.0
3.6
2.20
3.15
3.85
2.20
3.15
3.85
2.20
3.15
3.85
V
V
T−
Negative Threshold
Voltage
3.0
4.5
5.5
0.9
1.35
1.65
1.5
2.3
2.9
1.9
2.75
3.35
0.9
1.35
1.65
0.9
1.35
1.65
V
V
H
Hysteresis Voltage 3.0
4.5
5.5
0.30
0.40
0.50
0.57
0.67
0.74
1.20
1.40
1.60
0.30
0.40
0.50
1.20
1.40
1.60
0.30
0.40
0.50
1.20
1.40
1.60
V
V
OH
Minimum High−Level
Output Voltage
V
IN
≤ V
T
− Min
I
OH
= −50 mA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
1.9
2.9
4.4
V
I
OH
= −4 mA
I
OH
= −8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
V
OL
Maximum Low−Level
Output Voltage
V
IN
≥ V
T
+ Max
I
OL
= 50 mA
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
I
OL
= 4 mA
I
OL
= 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
I
IN
Maximum Input
Leakage Current
V
IN
= 5.5 V or GND 0 to
5.5
±0.1 ±1.0 ±1.0
mA
I
CC
Maximum Quiescent
Supply Current
V
IN
= V
CC
or GND 5.5 1.0 20 40
mA
AC ELECTRICAL CHARACTERISTICS Input t
r
= t
f
= 3.0 ns
Symbol Parameter Test Conditions
T
A
= 25°C T
A
≤ 85°C −55 ≤ T
A
≤ 125°C
Unit
Min Typ Max Min Max Min Max
t
PLH
,
t
PHL
Maximum Propagation
Delay, A to Y
V
CC
= 3.3 ± 0.3 V C
L
= 15 pF
C
L
= 50 pF
7.0
8.5
12.8
16.3
1.0
1.0
15.0
18.5
1.0
1.0
17.0
20.5
ns
V
CC
= 5.0 ± 0.5 V C
L
= 15 pF
C
L
= 50 pF
4.0
5.5
8.6
10.6
1.0
1.0
10.0
12.0
1.0
1.0
11.5
13.5
C
IN
Maximum Input
Capacitance
5 10 10 10 pF
C
PD
Power Dissipation Capacitance (Note 6)
Typical @ 25°C, V
CC
= 5.0 V
pF
7.0
6. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
. C
PD
is used to determine the no−load dynamic
power consumption; P
D
= C
PD
V
CC
2
f
in
+ I
CC
V
CC
.
P1-P3P4-P6

NLVVHC1G14DFT1G

Mfr. #:
Buy NLVVHC1G14DFT1G
Manufacturer:
ON Semiconductor
Description:
Inverters OCTAL NONINVERT BUS
Lifecycle:
New from this manufacturer.
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