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74ACTQ827SC

P1-P3P4-P6P7-P7
© 2000 Fairchild Semiconductor Corporation DS010687 www.fairchildsemi.com
March 1990
Revised September 2000
74ACTQ827 Quiet Series
10-Bit Buffer/Line Driver with 3-STATE Outputs
74ACTQ827
Quiet Series
10-Bit Buffer/Line Driver
with 3-STATE Outputs
General Description
The ACTQ827 10-bit bus buffer provides high performance
bus interface buffering for wide data/address paths or
buses carrying parity. The 10-bit buffers have NOR output
enables for maximum control flexibility. The ACTQ827 uti-
lizes Fairchild Quiet Series
technology to guarantee quiet
output switching and improved dynamic threshold perfor-
mance. FACT Quiet Series
features GTO output control
and undershoot corrector in addition to a split ground bus
for superior performance.
Features
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
■ Guaranteed pin-to-pin skew AC performance
■ Inputs and outputs on opposite sides of package allow
easy interface with microprocessors
■ Improved latch-up immunity
■ Outputs source/sink 24 mA
■ TTL compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT, Quiet Series, FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACTQ827SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ827SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
OE
1
, OE
2
Output Enable
D
0
–D
9
Data Inputs
O
0
–O
9
Data Outputs
www.fairchildsemi.com 2
74ACTQ827
Functional Description
The ACTQ827 line driver is designed to be employed as
memory address driver, clock driver and bus-oriented
transmitter/receiver. The devices have 3-STATE outputs
controlled by the Output Enable (OE
) pins. When the OE is
LOW, the device is transparent. When OE
is HIGH, the
device is in 3-STATE mode.
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
Z = HIGH Impedance
X = Immaterial
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs Outputs
Function
OE
D
n
O
n
L H H Transparent
L L L Transparent
H X Z High Z
3 www.fairchildsemi.com
74ACTQ827
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristic
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
= −0.5V −20 mA
V
I
= V
CC
+ 0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to V
CC
+ 0.5V
DC Output Diode Current (I
OK
)
V
O
= −0.5V −20 mA
V
O
= V
CC
+ 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to V
CC
+ 0.5V
DC Output Source
or Sink Current (I
O
) ± 50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
) ± 50 mA
Storage Temperature (T
STG
) −65°C to +150°C
DC Latch-Up Source
or Sink Current ± 300 mA
Junction Temperature (T
J
)
PDIP 140
°C
Supply Voltage (V
CC
) 4.5V to 5.5V
Input Voltage (V
I
)0V to V
CC
Output Voltage (V
O
)0V to V
CC
Operating Temperature (T
A
) −40°C to +85°C
Minimum Input Edge Rate
∆V/∆t 125 mV/ns
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
Symbol Parameter
V
CC
T
A
= +25°CT
A
= −40°C to +85°C
Units Conditions
(V) Typ Guaranteed Limits
V
IH
Minimum HIGH Level 4.5 1.5 2.0 2.0
V
V
OUT
= 0.1V
Input Voltage 5.5 1.5 2.0 2.0 or V
CC
− 0.1V
V
IL
Maximum LOW Level 4.5 1.5 0.8 0.8
V
V
OUT
= 0.1V
Input Voltage 5.5 1.5 0.8 0.8 or V
CC
− 0.1V
V
OH
Minimum HIGH Level 4.5 4.49 4.4 4.4
VI
OUT
= −50 µA
Output Voltage 5.5 5.49 5.4 5.4
V
IN
= V
IL
or V
IH
4.5 3.86 3.76 V I
OH
= −24 mA
5.5 4.86 4.76 I
OH
= −24 mA (Note 2)
V
OL
Maximum LOW Level 4.5 0.001 0.1 0.1
VI
OUT
= 50 µA
Output Voltage 5.5 0.001 0.1 0.1
V
IN
= V
IL
or V
IH
4.5 0.36 0.44 V I
OL
= 24 mA
5.5 0.36 0.44 I
OL
= 24 mA (Note 2)
I
IN
Maximum Input
5.5 ±0.1 ±1.0 µAV
I
= V
CC
, GND
Leakage Current
I
OZ
Maximum 3-STATE
5.5 ±0.5 ±5.0 µA
V
I
= V
IL
, V
IH
Current V
O
= V
CC
, GND
I
CCT
Maximum I
CC
/Input 5.5 0.6 1.5 mA V
I
= V
CC
− 2.1V
I
OLD
Minimum Dynamic 5.5 75 mA V
OLD
= 1.65V Max
I
OHD
Output Current (Note 3) 5.5 −75 mA V
OHD
= 3.85V Min
I
CC
Maximum Quiescent
5.5 8.0 80.0 µA
V
IN
= V
CC
Supply Current or GND
V
OLP
Quiet Output
5.0 1.1 1.6V V
Figures 1, 2
Maximum Dynamic V
OL
(Note 4)(Note 5)
V
OLV
Quiet Output
5.0 −0.6 −1.3 V
Figures 1, 2
Minimum Dynamic V
OL
(Note 4)(Note 5)
V
IHD
Minimum HIGH Level
5.0 1.9 2.0 V (Note 4)(Note 6)
Dynamic Input Voltage
V
ILD
Maximum LOW Level
5.0 1.2 0.8 V (Note 4)(Note 6)
Dynamic Input Voltage
P1-P3P4-P6P7-P7

74ACTQ827SC

Mfr. #:
Buy 74ACTQ827SC
Manufacturer:
ON Semiconductor / Fairchild
Description:
Buffers & Line Drivers 10-Bit Buf/Line Drv
Lifecycle:
New from this manufacturer.
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