MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS Repeaters
4 _______________________________________________________________________________________
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
, V
TL
, V
ID
, V
OD
, and V
OD
.
Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at T
A
= +25°C.
Note 3: Signal generator output for IN+, IN-, or single-ended IN: V
IN
= 0.4 sin(4E6πt) + 0.5.
Note 4: All input pulses are supplied by a generator having the following characteristics: t
R
or t
F
1ns, pulse repetition rate (PRR) =
0.5 Mpps, pulsewidth = 500 ±10ns.
Note 5: Guaranteed by design and characterization.
Note 6: Signal generator output for OUT+ or OUT-: V
IN
= 0.4 sin(4E6πt) + 0.5, EN_ = low.
Note 7: C
L
includes scope probe and test jig capacitance.
Note 8: Signal generator output for differential inputs IN+, IN- (unless otherwise noted): frequency = 50MHz, 49% to 51% duty cycle,
R
O
= 50, t
R
= 1.0ns, and t
F
= 1.0ns (0% to 100%). Signal generator output for single-ended input IN (unless otherwise noted):
frequency = 50MHz, 49% to 51% duty cycle, R
O
= 50, V
IH
= V
CC
, V
IL
= 0V, t
R
= 1.0ns, and t
F
= 1.0ns (0% to 100%).
Note 9: Signal generator output for MAX9169 t
DJ
: V
OH
= +1.3V, V
OL
= +1.1V, data rate = 630Mbps, 2
23
-1 PRBS, R
O
= 50,
t
R
= 1.0ns and t
F
= 1.0ns (0% to 100%). Signal generator output for MAX9170 t
DJ
: V
OH
= V
CC
, V
OL
= 0V, data rate =
630Mbps, 2
23
-1 PRBS, R
O
= 50, t
R
= 1.0ns, and t
F
= 1.0ns (0% to 100%).
Note 10: Signal generator output for MAX9169 t
RJ
: V
OH
= +1.3V, V
OL
= +1.1V, frequency = 315MHz, 50% duty cycle, R
O
= 50,
t
R
= 1.0ns, and t
F
= 1.0ns (0% to 100%). Signal generator output for MAX9170 t
RJ
: V
OH
= V
CC
, V
OL
= 0V, frequency =
315MHz, 50% duty cycle, R
O
= 50, t
R
= 1.0ns, and t
F
= 1.0ns (0% to 100%).
Note 11: Signal generator output for MAX9169 t
SK(P)
: V
OH
= +1.4V, V
OL
= +1.0V, R
O
= 50, t
R
= 1.0ns, and t
F
= 1.0ns (0% to 100%).
Signal generator output for MAX9170 t
SK(P)
: V
OH
= +3.0, V
OL
= 0V, R
O
= 50, t
R
= 1.0ns, and t
F
= 1.0ns (0% to 100%).
Note 12: t
SK(0)
is the magnitude of the time difference between t
PLH
or t
PHL
of all drivers of a single device with all of their inputs
connected together.
Note 13: t
SK(PP)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices when
both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, R
L
= 100 ±1%, C
L
= 10pF, EN_ = high, MAX9169 differential input voltage | V
ID
| = 0.15V to 1.2V, LVDS input
common-mode voltage V
CM
= | V
ID
/2 | to +2.4V - | V
ID
/2 |, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at | V
ID
| =
0.2V, V
CM
= 1.25V, V
CC
= 3.3V, T
A
= +25°C for MAX9169. Typical values are at V
IN
= 0 or V
CC
, V
CC = 3.3V
, T
A
= +25°C for
MAX9170.) (Notes 5, 7, and 8)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Rise Time t
R
Figures 1015 0.6 0.8 1.2 ns
Fall Time t
F
Figures 1015 0.6 0.8 1.2 ns
Added Deterministic Jitter
t
DJ
(Note 9) 110 200 ps
Added Random Jitter
t
RJ
(Note 10) 6 8 ps
MAX9169 2.2 3.5 4.2
Differential Propagation Delay
High to Low
t
PHL
Figures 10, 11, 13, 14
MAX9170 1.5 2.6 3.2
ns
MAX9169 2.2 3.5 4.2
Differential Propagation Delay
Low to High
t
PLH
Figures 10, 11, 13, 14
MAX9170 1.5 2.6 3.2
ns
Pulse Skew t
PLH
- t
PHL
t
SKEW
Figures 10, 11, 13, 14 40 250 ps
Pulse Skew t
PLH
- t
PHL
t
SK(P)
Figures 10, 12, 13, 15 (Note 11) 40 150 ps
MAX9169, Figures 10, 11, 12 25 120
Channel-to-Channel Skew
(Note 12)
t
SK(0)
MAX9170, Figures 13, 14, 15 15 100
ps
MAX9169, Figures 10, 11, 12 0.28 1.2
Differential Part-to-Part Skew
(Note 13)
t
SK(PP)
MAX9170, Figures 13, 14, 15 0.19 1.2
ns
t
PHZ
High to high-Z, Figures 1619 11 15
Disable Time
t
PLZ
Low to high-Z, Figures 1619 11.8 15
ns
t
PZH
High-Z to high, Figures 1619 2.3 10
Enable Time
t
PZL
High-Z to low, Figures 1619 5.8 10
ns
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS Repeaters
_______________________________________________________________________________________ 5
MAX9169 SUPPLY CURRENT
vs. FREQUENCY
MAX9169/70 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
2702251801359045
10
20
30
40
50
0
0 315
4 CHANNELS ACTIVE
3 CHANNELS ACTIVE
2 CHANNELS ACTIVE
1 CHANNEL ACTIVE
ALL CHANNELS DISABLED
MAX9170 SUPPLY CURRENT
vs. FREQUENCY
MAX9169/70 toc02
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
2702251801359045
10
20
30
40
0
0 315
4 CHANNELS ACTIVE
3 CHANNELS ACTIVE
2 CHANNELS ACTIVE
1 CHANNEL ACTIVE
ALL CHANNELS DISABLED
DIFFERENTIAL OUTPUT AMPLITUDE
vs. FREQUENCY
MAX9169/70 toc03
FREQUENCY (MHz)
DIFFERENTIAL OUTPUT AMPLITUDE (mV)
2702251801359045
240
280
320
360
200
0 315
V
CC
= 3.6V
V
CC
= 3.3V
V
CC
= 3.0V
TRANSITION TIME
vs. TEMPERATURE
MAX9169/70 toc04
TEMPERATURE (°C)
TRANSITION TIME (ns)
603510-15
740
760
780
800
820
840
720
-40 85
t
r
t
f
MAX9169 PROPAGATION DELAY
vs. TEMPERATURE
MAX9169/70 toc05
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
603510-15
3.3
3.4
3.5
3.6
3.7
3.8
3.2
-40 85
t
PHL
t
PLH
MAX9170 PROPAGATION DELAY
vs. TEMPERATURE
MAX9169/70 toc06
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
603510-15
2.5
2.6
2.7
2.8
2.9
2.4
-40 85
t
PLH
t
PHL
DIFFERENTIAL OUTPUT VOLTAGE
vs. LOAD RESISTOR
MAX9169/70 toc07
LOAD RESISTOR ()
DIFFERENTIAL OUTPUT VOLTAGE (mV)
12510075
200
300
400
500
600
100
50 150
TRANSITION TIME
vs. CAPACITIVE LOAD
MAX9169/70 toc08
CAPACITIVE LOAD (pF)
TRANSITION TIME (ps)
131197
750
800
850
900
950
700
515
t
r
t
f
Typical Operating Characteristics
(V
CC
= 3.3V, R
L
= 100, C
L
= 10pF, | V
ID
| = 150mV, V
CM
= 1.25V, f
IN
= 50MHz, T
A
= +25°C, unless otherwise noted.)
MAX9169/MAX9170
4-Port LVDS and LVTTL-to-LVDS Repeaters
6 _______________________________________________________________________________________
Pin Description
Table 1. MAX9169 Input/Output Functions
PIN
MAX9169 MAX9170
NAME FUNCTION
1 1 EN1
OUT1+/OUT1- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN1 high to enable
OUT1+/OUT1-. Set EN1 low to disable OUT1+/OUT1- (high-impedance mode). Integrated
pulldown to GND.
2 2 EN2
OUT2+/OUT2- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN2 high to enable
OUT2+/OUT2-. Set EN2 low to disable OUT2+/OUT2- (high-impedance mode). Integrated
pulldown to GND.
3 3 EN3
OUT3+/OUT3- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN3 high to enable
OUT3+/OUT3-. Set EN3 low to disable OUT3+/OUT3- (high-impedance mode). Integrated
pulldown to GND.
44V
CC
Power-Supply Voltage. Bypass with 0.1µF and 0.001µF capacitors to ground.
5 5 GND Ground
6 IN+ Noninverting Differential LVDS Input
7 IN- Inverting Differential LVDS Input
8 8 EN4
OUT4+/OUT4- Enable. +5V tolerant LVTTL/LVCMOS input. Set EN4 high to enable
OUT4+/OUT4-. Set EN4 low to disable OUT4+/OUT4- (high-impedance mode). Integrated
pulldown to GND.
9 9 OUT4- Inverting Differential LVDS Output
10 10 OUT4+ Noninverting Differential LVDS Output
11 11 OUT3- Inverting Differential LVDS Output
12 12 OUT3+ Noninverting Differential LVDS Output
13 13 OUT2- Inverting Differential LVDS Output
14 14 OUT2+ Noninverting Differential LVDS Output
15 15 OUT1- Inverting Differential LVDS Output
16 16 OUT1+ Noninverting Differential LVDS Output
6 IN Data Input, 5V Tolerant LVTTL/LVCMOS. Integrated pulldown to GND.
7 N.C. No Connection
INPUT OUTPUT
V
ID
= V
IN+
- V
IN-
EN_ V
OD
X Low or open High-Z
+50mV High High
-50mV High Low
Open High High
Undriven short High High
Undriven parallel terminated High High
Table 2. MAX9170 Input/Output Functions
INPUT OUTPUT
V
IN
EN_ V
OD
X Low or open High-Z
High High High
Low High Low
Open High Low

MAX9169EUE+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Interface - Signal Buffers, Repeaters 4Port LVDS & LVTTL to LVDS Repeater
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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