Document Number: 72091
S13-1285-Rev. C, 27-May-13
www.vishay.com
9
Vishay Siliconix
DG2041, DG2042, DG2043
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: pmostechsupport@vishay.com
TEST CIRCUITS
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72091
.
Figure 1. Switching Time
Switch
Input
C
L
(includes fixture and stray capacitance)
V+
IN
NO or NC
C
L
35 pF
COM
Logic
Input
R
L
300 Ω
V
OUT
GND
V+
50 %
0 V
Logic
Input
Switch
Output
t
ON
t
OFF
Logic "1" = Switch On
Logic input waveforms inverted for switches that have
the opposite logic sense.
Switch Output
V
OUT
=V
COM
R
L
R
L
+R
ON
0.9 x V
OUT
t
r
< 5 ns
t
f
< 5 ns
V
INH
V
INL
Figure 2. Charge Injection
Off
OnOn
IN
ΔV
OUT
V
OUT
Q = ΔV
OUT
x C
L
C
L
= 1 nF
COM
R
gen
V
OUT
NC or NO
V
IN
= 0 - V+
IN
V
gen
GND
V+
V+
IN depends on switch configuration: input polarity
determined by sense of switch.
+
Figure 3. Off-Isolation
IN
GND
NC or NO
0 V, 2.4 V
10 nF
COM
Off Isolation = 20 log
V
COM
V
NO/ NC
R
L
Analyzer
V+
V+
Figure 4. Channel Off/On Capacitance
NC or NO
f = 1 MHz
IN
COM
GND
0 V, 2.4 V
Meter
HP4192A
Impedance
Analyzer
or Equivalent
10 nF
V+
V+
