LTC3407A-2
7
3407a2f
The LTC3407A-2 uses a constant frequency, current mode
architecture. The operating frequency is set at 2.25MHz
and can be synchronized to an external oscillator. Both
channels share the same clock and run in-phase. To suit
a variety of applications, the selectable MODE/SYNC pin
allows the user to trade-off noise for efficiency.
The output voltage is set by an external divider returned to
the V
FB
pins. An error amplifier compares the divided
output voltage with a reference voltage of 0.6V and adjusts
the peak inductor current accordingly. Overvoltage and
undervoltage comparators will pull the POR output low if
the output voltage is not within ±8.5%. The POR output
will go high after 65,536 clock cycles (about 29ms in pulse
skipping mode) of achieving regulation.
Main Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle
when the V
FB
voltage is below the reference voltage. The
current into the inductor and the load increases until the
current limit is reached. The switch turns off and energy
stored in the inductor flows through the bottom switch (N-
channel MOSFET) into the load until the next clock cycle.
The peak inductor current is controlled by the internally
compensated I
TH
voltage, which is the output of the error
amplifier.This amplifier compares the V
FB
pin to the 0.6V
reference. When the load current increases, the V
FB
volt-
age decreases slightly below the reference. This
decrease causes the error amplifier to increase the I
TH
voltage until the average inductor current matches the new
load current.
The main control loop is shut down by pulling the RUN/SS
pin to ground.
Low Current Operation
Two modes are available to control the operation of the
LTC3407A-2 at low currents. Both modes automatically
switch from continuous operation to the selected mode
when the load current is low.
To optimize efficiency, the Burst Mode operation can be
selected. When the load is relatively light, the LTC3407A-2
OPERATIO
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automatically switches into Burst Mode operation in which
the PMOS switch operates intermittently based on load
demand with a fixed peak inductor current. By running
cycles periodically, the switching losses which are domi-
nated by the gate charge losses of the power MOSFETs are
minimized. The main control loop is interrupted when the
output voltage reaches the desired regulated value. A
voltage comparator trips when I
TH
is below 0.65V, shut-
ting off the switch and reducing the power. The output
capacitor and the inductor supply the power to the load
until I
TH
exceeds 0.65V, turning on the switch and the main
control loop which starts another cycle.
For lower ripple noise at low currents, the pulse skipping
mode can be used. In this mode, the LTC3407A-2 contin-
ues to switch at a constant frequency down to very low
currents, where it will begin skipping pulses.
Dropout Operation
When the input supply voltage decreases toward the
output voltage, the duty cycle increases to 100% which is
the dropout condition. In dropout, the PMOS switch is
turned on continuously with the output voltage being
equal to the input voltage minus the voltage drops across
the internal P-channel MOSFET and the inductor.
An important design consideration is that the R
DS(ON)
of
the P-channel switch increases with decreasing input
supply voltage (See Typical Performance Characteristics).
Therefore, the user should calculate the power dissipation
when the LTC3407A-2 is used at 100% duty cycle with low
input voltage (See Thermal Considerations in the Applica-
tions Information Section).
Low Supply Operation
The LTC3407A-2 incorporates an undervoltage lockout
circuit which shuts down the part when the input voltage
drops below about 1.65V to prevent unstable operation.
A general LTC3407A-2 application circuit is shown in
Figure 1. External component selection is driven by the
load requirement, and begins with the selection of the
inductor L. Once the inductor is chosen, C
IN
and C
OUT
can
be selected.
LTC3407A-2
8
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Input Capacitor (C
IN
) Selection
In continuous mode, the input current of the converter is
a square wave with a duty cycle of approximately V
OUT
/
V
IN
. To prevent large voltage transients, a low equivalent
series resistance (ESR) input capacitor sized for the maxi-
mum RMS current must be used. The maximum RMS
capacitor current is given by:
II
VVV
V
RMS MAX
OUT IN OUT
IN
(– )
where the maximum average output current I
MAX
equals
the peak current minus half the peak-to-peak ripple cur-
rent, I
MAX
= I
LIM
ΔI
L
/2.
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst-case is commonly used
to design because even significant deviations do not offer
much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours life-
time. This makes it advisable to further derate the capaci-
tor, or choose a capacitor rated at a higher temperature
than required. Several capacitors may also be paralleled to
meet the size or height requirements of the design. An
additional 0.1μF to 1μF ceramic capacitor is also recom-
mended on V
IN
for high frequency decoupling, when not
using an all ceramic capacitor solution.
Table 1. Representative Surface Mount Inductors
MANU- MAX DC
FACTURER PART NUMBER VALUE CURRENT DCR HEIGHT
Taiyo Yuden CB2016T2R2M 2.2μH 510mA 0.13Ω 1.6mm
CB2012T2R2M 2.2μH 530mA 0.33Ω 1.25mm
CB2016T3R3M 3.3μH 410mA 0.27Ω 1.6mm
Panasonic ELT5KT4R7M 4.7μH 950mA 0.2Ω 1.2mm
Sumida CDRH2D18/LD 4.7μH 630mA 0.086Ω 2mm
Murata LQH32CN4R7M23 4.7μH 450mA 0.2Ω 2mm
Taiyo Yuden NR30102R2M 2.2μH 1100mA 0.1Ω 1mm
NR30104R7M 4.7μH 750mA 0.19Ω 1mm
FDK FDKMIPF2520D 4.7μH 1100mA 0.11Ω 1mm
FDKMIPF2520D 3.3μH 1200mA 0.1Ω 1mm
FDKMIPF2520D 2.2μH 1300mA 0.08Ω 1mm
TDK VLF3010AT4R7- 4.7μH 700mA 0.28Ω 1mm
MR70
VLF3010AT3R3- 3.3μH 870mA 0.17Ω 1mm
MR87
VLF3010AT2R2- 2.2μH 1000mA 0.12Ω 1mm
M1R0
APPLICATIO S I FOR ATIO
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Inductor Selection
Although the inductor does not influence the operating
frequency, the inductor value has a direct effect on ripple
current. The inductor ripple current ΔI
L
decreases with
higher inductance and increases with higher V
IN
or V
OUT
:
Δ =
I
V
fL
V
V
L
OUT
O
OUT
IN
•–1
Accepting larger values of ΔI
L
allows the use of low
inductances, but results in higher output voltage ripple,
greater core losses, and lower output current capability.
A reasonable starting point for setting ripple current is
ΔI
L
= 0.3 • I
LIM
, where I
LIM
is the peak switch current limit.
The largest ripple current ΔI
L
occurs at the maximum
input voltage. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation:
L
V
fI
V
V
OUT
OL
OUT
IN MAX
=
Δ
•–
()
1
The inductor value will also have an effect on Burst Mode
operation. The transition from low current operation be-
gins when the peak inductor current falls below a level set
by the burst clamp. Lower inductor values result in higher
ripple current which causes this transition to occur at
lower load currents. This causes a dip in efficiency in the
upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to increase.
Inductor Core Selection
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy mate-
rials are small and don’t radiate much energy, but gener-
ally cost more than powdered iron core inductors with
similar electrical characterisitics. The choice of which
style inductor to use often depends more on the price vs
size requirements and any radiated field/EMI require-
ments than on what the LTC3407A-2 requires to operate.
Table 1 shows some typical surface mount inductors that
work well in LTC3407A-2 applications.
LTC3407A-2
9
3407a2f
trace inductance can lead to significant ringing. Other
capacitor types include the Panasonic Special Polymer
(SP) capacitors.
In most cases, 0.1μF to 1μF of ceramic capacitors should
also be placed close to the LTC3407A-2 in parallel with the
main capacitors for high frequency decoupling.
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. These are tempt-
ing for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor ESR
generates a loop “zero” at 5kHz to 50kHz that is instrumen-
tal in giving acceptable loop phase margin. Ceramic ca-
pacitors remain capacitive to beyond 300kHz and usually
resonate with their ESL before ESR becomes effective.
Also, ceramic caps are prone to temperature effects which
requires the designer to check loop stability over the
operating temperature range. To minimize their large
temperature and voltage coefficients, only X5R or X7R
ceramic capacitors should be used. A good selection of
ceramic capacitors is available from Taiyo Yuden, TDK,
and Murata.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the V
IN
pin. At best, this ringing can
couple to the output and be mistaken as loop instability.
APPLICATIO S I FOR ATIO
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Figure 1. LTC3407A-2 General Schematic
V
OUT2
RUN/SS2
V
IN
V
IN
= 2.5V TO 5.5V
V
OUT1
RUN/SS1
POR
SW1
V
FB1
GND
V
FB2
SW2
MODE/SYNC
LTC3407A-2
C
IN
R7
POWER-ON
RESET
C1C2
L1
L2
R4 R2
R1
R3
C
OUT2
C4 C3
C
OUT1
3407A2 F01
PULSESKIP*
BURST*
*MODE/SYNC = 0V: PULSE SKIP
MODE/SYNC = V
IN
: Burst Mode
R6 R5
Output Capacitor (C
OUT
) Selection
The selection of C
OUT
is driven by the required ESR to
minimize voltage ripple and load step transients. Typically,
once the ESR requirement is satisfied, the capacitance is
adequate for filtering. The output ripple (ΔV
OUT
) is deter-
mined by:
Δ≈Δ +
V I ESR
fC
OUT L
O OUT
1
8
where f
O
= operating frequency, C
OUT
= output capacitance
and ΔI
L
= ripple current in the inductor. The output ripple
is highest at maximum input voltage since ΔI
L
increases
with input voltage. With ΔI
L
= 0.3 • I
LIM
the output ripple
will be less than 100mV at maximum V
IN
and f
O
= 2.25MHz
with:
ESR
COUT
< 150mΩ
Once the ESR requirements for C
OUT
have been met, the
RMS current rating generally far exceeds the I
RIPPLE(P-P)
requirement, except for an all ceramic solution.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirement of the application. Alumi-
num electrolytic, special polymer, ceramic and dry tantulum
capacitors are all available in surface mount packages. The
OS-CON semiconductor dielectric capacitor available from
Sanyo has the lowest ESR(size) product of any aluminum
electrolytic at a somewhat higher price. Special polymer
capacitors, such as Sanyo POSCAP, offer very low ESR,
but have a lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density.
However, they also have a larger ESR and it is critical that
they are surge tested for use in switching power supplies.
An excellent choice is the AVX TPS series of surface mount
tantalums, available in case heights ranging from 2mm to
4mm. Aluminum electrolytic capacitors have a signifi-
cantly larger ESR, and are often used in extremely cost-
sensitive applications provided that consideration is given
to ripple current ratings and long term reliability. Ceramic
capacitors have the lowest ESR and cost, but also have the
lowest capacitance density, a high voltage and tempera-
ture coefficient, and exhibit audible piezoelectric effects.
In addition, the high Q of ceramic capacitors along with

LTC3407AEMSE-2#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual 800mA, 2.25MHz Synchronous Step Down
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