NCP2821
http://onsemi.com
12
DESCRIPTION INFORMATION
Detailed Description
The basic structure of the NCP2821 is composed of one
analog pre−amplifier, a pulse width modulator and an
H−bridge CMOS power stage. The first stage is externally
configurable with gain−setting resistor R
i
and the internal
fixed feedback resistor R
f
(the closed−loop gain is fixed by
the ratios of these resistors) and the other stage is fixed. The
load is driven differentially through two output stages.
The differential PWM output signal is a digital image of
the analog audio input signal. The human ear is a band pass
filter regarding acoustic waveforms, the typical values of
which are 20 Hz and 20 kHz. Thus, the user will hear only
the amplified audio input signal within the frequency range.
The switching frequency and its harmonics are fully filtered.
The inductive parasitic element of the loudspeaker helps to
guarantee a superior distortion value.
Power Amplifier
The output PMOS and NMOS transistors of the amplifier
have been designed to deliver the output power of the
specifications without clipping. The channel resistance
(R
on
) of the NMOS and PMOS transistors is typically 0.3.
Turn On and Turn Off Transitions
In order to eliminate “pop and click” noises during
transition, the output power in the load must not be
established or cutoff suddenly. When a logic high is applied
to the shutdown pin, the internal biasing voltage rises
quickly and, 4 ms later, once the output DC level is around
the common mode voltage, the gain is established slowly
(5.0 ms). This method to turn on the device is optimized in
terms of rejection of “pop and click” noises. Thus, the total
turn on time to get full power to the load is 9 ms (typical)
(see Figure 35).
The device has the same behavior when it is turned−off by
a logic low on the shutdown pin. No power is delivered to the
load 5 ms after a falling edge on the shutdown pin
(see Figure 36). Due to the fast turn on and off times, the
shutdown signal can be used as a mute signal as well.
Shutdown Function
The device enters shutdown mode when the shutdown
signal is low. During the shutdown mode, the DC quiescent
current of the circuit does not exceed 1.5 A.
Current Breaker Circuit
The maximum output power of the circuit corresponds to
an average current in the load of 820 mA.
In order to limit the excessive power dissipation in the
load if a short−circuit occurs, a current breaker cell shuts
down the output stage. The current in the four output MOS
transistors are real−time controlled, and if one current
exceeds the threshold set to 1.5 A, the MOS transistor is
opened and the current is reduced to zero. As soon as the
short−circuit is removed, the circuit is able to deliver the
expected output power.
This patented structure protects the NCP2821. Since it
completely turns off the load, it minimizes the risk of the
chip overheating which could occur if a soft current limiting
circuit was used.
