LTC4081
14
4081fa
For more information www.linear.com/LTC4081
Constant-Frequency (PWM) Mode Operation
The switching regulator operates in constant-frequency
(PWM) mode when the MODE pin is pulled below V
IL
. In
this mode, it uses a current mode architecture including
an oscillator, an error amplifier, and a PWM comparator
for excellent line and load regulation. The main switch
MP2 (P-channel MOSFET) turns on to charge the inductor
at the beginning of each clock cycle if the FB pin voltage
is less than the 0.8V reference voltage. The current into
the inductor (and the load) increases until it reaches the
peak current demanded by the error amp. At this point,
the main switch turns off and the synchronous switch
MN1 (N-channel MOSFET) turns on allowing the inductor
current to flow from ground to the load until either the
next clock cycle begins or the current reduces to the zero
current (I
ZERO
) level.
Oscillator: In constant-frequency mode, the switching
regulator uses a dedicated oscillator which runs at a
fixed frequency of 2.25MHz. This frequency is chosen to
minimize possible interference with the AM radio band.
Error Amplifier: The error amplifier is an internally com-
pensated transconductance (g
m
) amplifier with a g
m
of
65
µ
mhos. The internal 0.8V reference voltage is compared
to the voltage at the FB pin to generate a current signal
at the output of the error amplifier. This current signal
represents the peak inductor current required to achieve
regulation.
PWM Comparator: Lossless current sensing converts
the PMOS switch current signal to a voltage which is
summed with the internal slope compensation signal.
The PWM comparator compares this summed signal to
determine when to turn off the main switch. The switch
current sensing is blanked for ~12ns at the beginning of
each clock cycle to prevent false switch turn-off.
Burst Mode Operation
Burst Mode operation can be selected by pulling the
MODE pin above V
IH
. In this mode, the internal oscil-
lator is disabled, the error amplifier is converted into a
comparator monitoring the FB voltage, and the inductor
current swings between a fixed I
PEAK
(~100mA) and I
ZERO
(35mA) irrespective of the load current as long as the FB
pin voltage is less than or equal to the reference voltage
of 0.8V. Once V
FB
is greater than 0.8V, the control logic
shuts off both switches along with most of the circuitry
and the regulator is said to enter into SLEEP mode. In
SLEEP mode, the regulator only draws about 20
µ
A from
the BAT pin provided that the battery charger is turned
off. When the output voltage droops about 1% from its
nominal value, the regulator wakes up and the inductor
current resumes swinging between I
PEAK
and I
ZERO
. The
output capacitor recharges and causes the regulator to
re-enter the SLEEP state if the output load remains light
enough. The frequency of this intermittent burst operation
depends on the load current. That is, as the load current
drops further, the regulator turns on less frequently. Thus
Burst Mode operation increases the efficiency at light
loads by minimizing the switching and quiescent losses.
However, the output voltage ripple increases to about 2%.
To minimize ripple in the output voltage, the current limits
for both switches in Burst Mode operation are reduced to
about 20% of their values in the constant-frequency mode.
Also the zero current of the synchronous switch is changed
to about 35mA thereby preventing reverse conduction
through the inductor. Consequently, the regulator can only
deliver approximately 67mA of load current while in Burst
Mode operation. Any attempt to draw more load cur
rent
will cause the output voltage to drop out of regulation.
Current Limit
To prevent inductor current runaway, there are absolute
current limits (I
LIM
) on both the PMOS main switch and
the NMOS synchronous switch. These limits are internally
set at 520mA and 700mA respectively for PWM mode. If
the peak inductor current demanded by the error amplifier
ever exceeds the PMOS I
LIM
, the error amplifier will be
ignored and the inductor current will be limited to PMOS
I
LIM
. In Burst Mode operation, the PMOS current limit
is reduced to 100mA to minimize output voltage ripple.
Zero Current Comparator
The zero or reverse current comparator monitors the induc-
tor current to the output and shuts off the synchronous
rectifier when this current reduces to a predetermined
value (I
ZERO
). In fixed frequency mode, this is set to
OPERATION
