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ADG798HFRZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
ADG798 Data Sheet
Rev. 0 | Page 6 of 20
CONTINUOUS CURRENT PER CHANNEL, Sx OR D
Table 4.
Parameter 175°C 210°C Unit
CONTINUOUS CURRENT, Sx OR D
V
DD
= 5 V, V
SS
= 0 V, θ
JA
= 70°C/W 30 30 mA maximum
V
DD
= 3 V, V
SS
= 0 V, θ
JA
= 70°C/W 30 30 mA maximum
V
DD
= +2.5 V, V
SS
= −2.5 V, θ
JA
= 70°C/W 30 30 mA maximum
Data Sheet ADG798
Rev. 0 | Page 7 of 20
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 5.
Parameter Rating
V
DD
to V
SS
7 V
V
DD
to GND −0.3 V to +7 V
V
SS
to GND +0.3 V to −3.5 V
Analog Inputs
1
V
SS
− 0.3 V to V
DD
+ 0.3 V
or 30 mA, whichever
occurs first
Digital Inputs
1
−0.3 V to V
DD
+ 0.3 V or
30 mA, whichever
occurs first
Peak Current, Sx or D (Pulsed at 1 ms,
10% Duty Cycle Maximum)
94.9 mA
Continuous Current, Sx or D
2
Data + 5%
Operating Temperature Range −55°C to +210°C
Junction Temperature 211°C
1
Overvoltages at Ax, EN, Sx, or D are clamped by internal codes. Limit the
current to the maximum ratings given.
2
See Table 4.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Only one absolute maximum rating can be applied at any one time.
THERMAL RESISTANCE
Thermal performance is directly linked to PCB design and
operating environment. Close attention to PCB thermal design
is required.
Table 6. Thermal Resistance
Package Type
1
θ
JA
θ
JC
Unit
F-16-1
70 22 °C/W
FR-16-1
70 10 °C/W
1
Thermal impedance simulated values are based on a JEDEC 2s2p thermal
test board. See JEDEC JESD51.
ESD CAUTION
ADG798 Data Sheet
Rev. 0 | Page 8 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
A0
EN
S2
S3
S4
V
SS
S1
D
A1
A2
S5
S6
S7
GND
V
DD
S8
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ADG798
TOP VIEW
(Not to Scale)
14880-002
Figure 2. FLATPACK Pin Configuration
14880-004
A1
A2
S5
S6
S7
GND
V
DD
S8
A0
EN
S2
S3
S4
V
SS
S1
D
ADG798
TOP VIEW
(Not to Scale)
1
2
3
4
5
16
15
14
13
12
611
7
10
8
9
Figure 3. Reversed Formed FLATPACK Pin Configuration
Table 7. Pin Function Descriptions
Pin No. Mnemonic Description
1 A0 Digital Input. This pin controls the configuration of the switch, as described in the truth table (see Table 8).
2 EN Digital Input. This pin controls the configuration of the switch, as shown in the truth table (see Table 8).
3 V
SS
Most Negative Power Supply Pin in Dual-Supply Applications. For single-supply applications, tie this pin to GND.
4 S1 Source Terminal. This pin can be an input or output.
5 S2 Source Terminal. This pin can be an input or output.
6 S3 Source Terminal. This pin can be an input or output.
7 S4 Source Terminal. This pin can be an input or output.
8 D Drain Terminal. This pin can be an input or output.
9 S8 Source Terminal. This pin can be an input or output.
10 S7 Source Terminal. This pin can be an input or output.
11 S6 Source Terminal. This pin can be an input or output.
12 S5 Source Terminal. This pin can be an input or output.
13 V
DD
Most Positive Power Supply Pin.
14 GND Ground (0 V) Reference.
15 A2 Digital Input. This pin controls the configuration of the switch, as shown in the truth table (see Table 8).
16 A1 Digital Input. This pin controls the configuration of the switch, as shown in the truth table (see Table 8).
TRUTH TABLE
Table 8. Truth Table
A2 A1 A0 EN Switch Condition
X
1
X
1
X
1
0 None
0 0 0 1 S1
0 0 1 1 S2
0 1 0 1 S3
0 1 1 1 S4
1 0 0 1 S5
1 0 1 1 S6
1 1 0 1 S7
1 1 1 1 S8
1
X means don’t care.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

ADG798HFRZ

Mfr. #:
Buy ADG798HFRZ
Manufacturer:
Analog Devices Inc.
Description:
Multiplexer Switch ICs Latchup Proof, 20V, 15V,+12V,+36V 8-1MUX
Lifecycle:
New from this manufacturer.
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