Rev. 1.2 5/16 Copyright © 2016 by Silicon Laboratories Si535/536
Si535/536
ULTRA LOW JITTER CRYSTAL OSCILLATOR (XO)
Features
Applications
Description
The Si535/536 XO utilizes Silicon Labs’ advanced DSPLL
®
circuitry to
provide an ultra low jitter clock at high-speed differential frequencies. Unlike a
traditional XO, where a different crystal is required for each output frequency,
the Si535/536 uses one fixed crystal to provide a wide range of output
frequencies. This IC based approach allows the crystal resonator to provide
exceptional frequency stability and reliability. In addition, DSPLL clock
synthesis provides superior supply noise rejection, simplifying the task of
generating low jitter clocks in noisy environments typically found in
communication systems. The Si535/536 IC based XO is factory programmed
at time of shipment, thereby eliminating long lead times associated with
custom oscillators.
Functional Block Diagram
Available with select frequencies from
100 MHz to 312.5 MHz
3
rd
generation DSPLL
®
with superior
jitter performance and high-power
supply noise rejection
3x better frequency stability than
SAW-based oscillators
Available with LVPECL and
LVDS outputs
3.3 and 2.5 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
10/40/100G data centers
10G Ethernet switches/routers
Fibre channel/SAS/storage
Enterprise servers
Networking
Telecommunications
Fixed
Frequency
XO
100–312.5 MHz
DSPLL
®
Clock Synthesis
V
DD
CLK+CLK–
OE
GND
Ordering Information:
See page 7.
Pin Assignments:
See page 6.
(Top View)
1
2
3
6
5
4GND
OE
V
DD
CLK+
CLK–
NC
1
2
3
6
5
4GND
NC
V
DD
CLK+
CLK–
OE
REVISION D
