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536EC000292DG

P1-P3P4-P6P7-P9P10-P12
Si535/536
Rev. 1.2 7
3. Ordering Information
The Si535/536 XO supports a variety of options including frequency, temperature stability, output format, and V
DD
.
The Si535 and Si536 XO series are supplied in an industry-standard, RoHS compliant, 6-pad, 5 x 7 mm package.
The Si536 Series supports an alternate OE pinout (pin #1) for the LVPECL and LVDS output formats. See Tables 9
and 10 for the pinout differences between the Si535 and Si536 series.
Figure 2. Part Number Convention
53x
X
X
1
st
Option Code
V
DD
Output Format Output Enable Polarity
A 3.3 LVPECL High
B 3.3 LVDS High
E 2.5 LVPECL High
F 2.5 LVDS High
D
G R
Tape & Reel Packaging
Blank = Trays
Operating Temp Range (°C)
G -40 to +85 °C
Device Output Enable
535 pin 2
536 pin 1
Example P/N: 535AB156M250DGR is a 5 x 7 XO in a 6 pad package. The frequency is 156.250 MHz, with a 3.3 V supply, LVPECL output,
and Output Enable active high polarity. Temperature stability is specifed as ±20 ppm. The part is specified for –40 to +85 °C ambient
temperature range operation and is shipped in tape and reel format.
2
nd
Option Code
Code Temperature Stability (ppm, max, ±) Total Stablility (ppm, max, ±)
B 20 31.5
C 7 20
Frequency (e.g., 156M250 is 156.250 MHz)
Select frequencies available in the frequency range 100 to 312.5 MHz
are listed below. Frequencies requiring greater than 6 digit resolution
are assigned a six digit code.
Part Revision Letter
AvailableFrequencies FrequencyOrderCode
106.250MHz 106M250
125.000MHz 125M000
150.000MHz 150M000
155.520MHz 155M520
156.250MHz 156M250
156.2578MHz 000305
156.2539MHz 000335
156.26953MHz 000338
161.1328MHz
000292
166.6286MHz
000172
167.3316MHz
000175
212.500MHz
212M500
312.500MHz
312M500
159.375MHz
159M375
XXXMXXX
100.000MHz
100M000
Si535/536
8 Rev. 1.2
4. Package Outline
Figure 3 illustrates the package details for the Si535/536. Table 11 lists the values for the dimensions shown in the
illustration.
Figure 3. Si535/536 Outline Diagram
Table 11. Package Diagram Dimensions (mm)
Dimension Min Nom Max
A 1.50 1.65 1.80
b 1.30 1.40 1.50
c 0.50 0.60 0.70
D 5.00 BSC
D1 4.30 4.40 4.50
e 2.54 BSC
E 7.00 BSC
E1 6.10 6.20 6.30
H 0.55 0.65 0.75
L 1.17 1.27 1.37
p 1.80 — 2.60
R 0.70 REF
aaa 0.15
bbb 0.15
ccc 0.10
ddd 0.10
eee 0.05
Si535/536
Rev. 1.2 9
5. 6-Pin PCB Land Pattern
Figure 4 illustrates the 6-pin PCB land pattern for the Si535/536. Table 12 lists the values for the dimensions shown
in the illustration.
Figure 4. Si535/536 PCB Land Pattern
Table 12. PCB Land Pattern Dimensions (mm)
Dimension Min
C1 4.20
E2.54
X1 1.55
Y1 1.95
Notes:
General
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on the IPC-7351 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based
on a Fabrication Allowance of 0.05 mm.
Solder Mask Design
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to
be 60 µm minimum, all the way around the pad.
Stencil Design
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder
paste release.
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1.
Card Assembly
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
P1-P3P4-P6P7-P9P10-P12

536EC000292DG

Mfr. #:
Buy 536EC000292DG
Manufacturer:
Silicon Labs
Description:
Standard Clock Oscillators Differential/single-ended; single frequency XO; OE pin 2; 10-1417 MHz
Lifecycle:
New from this manufacturer.
Delivery:
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