LT3471
4
3471fb
FB1N (Pin 1): Negative Feedback Pin for Switcher 1.
Connect resistive divider tap here. Minimize trace area at
FB1N. Set V
OUT
= V
FB1P
(1 + R1/R2), or connect to ground
for inverting topologies.
FB1P (Pin 2): Positive Feedback Pin for Switcher 1. Connect
either to V
REF
or a divided down version of V
REF
, or connect
to a resistive divider tap for inverting topologies.
V
REF
(Pin 3): 1.00V Reference Pin. Can supply up to
1mA of current. Do not pull this pin high. Must be locally
bypassed with
no less than 0.01μF and no more than 1μF
.
A 0.1μF ceramic capacitor is recommended. Use this pin
as the positive feedback reference or connect a resistor
divider here for a smaller reference voltage.
FB2P (Pin 4): Same as FB1P but for Switcher 2.
FB2N (Pin 5): Same as FB1N but for Switcher 2.
SW2 (Pin 6): Switch Pin for Switcher 2 (Collector of in-
ternal NPN power switch). Connect inductor/diode here
and minimize the metal trace area connected to this pin
to minimize EMI.
SHDN/SS2 (Pin 7): Shutdown and Soft-Start Pin. Tie to
1.8V or more to enable device. Ground to shut down. Sof t-
start function is provided when the voltage at this pin is
ramped slowly to 1.8V with an external RC circuit.
V
IN
(Pin 8): Input Supply. Must be locally bypassed.
SHDN/SS1 (Pin 9): Same as SHDN/SS2 but for Switcher 1.
Note: taking either SHDN/SS pin high will enable the part.
Each switcher is individually enabled with its respective
SHDN/SS pin.
SW1 (Pin 10): Same as SW2 but for Switcher 1.
Exposed Pad (Pin 11): Ground. Connect directly to local
ground plane. This ground plane also serves as a heat
sink for optimal thermal performance.
TYPICAL PERFORMANCE CHARACTERISTICS
Oscillator Frequency
vs Temperature
Peak Switch Current
vs SHDN/SS Voltage
Start-Up Waveform
(Figure 2 Circuit)
TEMPERATURE (°C)
–50
1.00
FREQUENCY (MHz)
1.05
1.15
1.20
1.25
1.50
1.35
0
50
75
3471 G07
1.10
1.40
1.45
1.30
–25
25
100
125
V
SHDN/SS
(V)
0
SWITCH CURRENT (A)
1.2
1.6
2.0
1.6
3471 G08
0.8
0.4
1.0
1.4
1.8
0.6
0.2
0
0.40.2
0.80.6
1.2 1.4 1.8
1
2.0
T
A
= 25°C
0.5ms/DIV
3471 G09
I
SUPPLY
1A/DIV
V
OUT1
2V/DIV
V
OUT2
5V/DIV
CONTROL 1
AND 2
5V/DIV
PIN FUNCTIONS
LT3471
5
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BLOCK DIAGRAM
Figure 1. Block Diagram
OPERATION
The LT3471 uses a constant frequency, current mode
control scheme to provide excellent line and load regu-
lation. Refer to the Block Diagram. At the start of each
oscillator cycle, the SR latch is set, which turns on the
power switch, Q1 (Q2). A voltage proportional to the switch
current is added to a stabilizing ramp and the resulting
sum is fed in to the positive terminal of the PWM compara-
tor A2 (A4). When this voltage exceeds the level at the
negative input of A2 (A4), the SR latch is reset, turning
off the power switch Q1 (Q2). The level at the negative
input of A2 (A4) is set by the error amplifi er A1 (A3) and
is simply an amplifi ed version of the difference between
the negative feedback voltage and the positive feedback
voltage, usually tied to the reference voltage V
REG
. In
this manner, the error amplifi er sets the correct peak
current level to keep the output in regulation. If the error
amplifi ers output increases, more current is delivered to
the output. Similarly, if the error decreases, less current
is delivered. Each switcher functions independently but
they share the same oscillator and thus the switchers are
always in phase. Enabling the par t is done by taking either
SHDN/SS pin above 1.8V. Disabling the part is done by
grounding both SHDN/SS pins. The soft-start feature of
the LT3471 allows for clean start-up conditions by limiting
the amount of voltage rise at the output of comparator A1
and A2, which in turn limits the peak switching current.
The soft-start feature for each switcher is enabled by
slowly ramping that switcher’s SHDN/SS pin, using an
RC network, for example. Typical resistor and capacitor
values are 0.33μF and 4.7k, allowing for a start-up time
on the order of milliseconds. The LT3471 has a current
limit circuit not shown in the Block Diagram. The switch
current is constantly monitored and not allowed to exceed
the maximum switch current (typically 1.6A). If the switch
+
+
RQ
S
0.01Ω
SW1
DRIVER
10
FB1N
SHDN/SS1
1
9
FB1P
2
+
RAMP
GENERATOR
1.00V
REFERENCE
LEVEL
SHIFTER
R
C
C
C
1.2MHz
OSCILLATOR
GND
GND
Q1
A2
A1
V
IN
V
REF
8 3
+
+
RQ
S
0.01Ω
SW2
DRIVER
6
11
FB2N
SHDN/SS2
5
7
FB2P
4
+
RAMP
GENERATOR
LEVEL
SHIFTER
R
C
C
C
3471 F01
Q2
A4
A3
LT3471
6
3471fb
OPERATION
APPLICATIONS INFORMATION
Duty Cycle
The typical maximum duty cycle of the LT3471 is 94%.
The duty cycle for a given application is given by:
DC =
|V
OUT
|+|V
D
|–|V
IN
|
|V
OUT
|+|V
D
|–|V
CESAT
|
Where V
D
is the diode forward voltage drop and V
CESAT
is in the worst case 330mV (at 1.3A)
The LT3471 can be used at higher duty cycles, but it must
be operated in the discontinuous conduction mode so that
the actual duty cycle is reduced.
Setting Output Voltage
Setting the output voltage depends on the topology used.
For normal noninverting boost regulator topologies:
V
OUT
= V
FBP
1+
R1
R2
where V
FBN
is connected between R1 and R2 (see the
Typical Applications section for examples).
Select values of R1 and R2 according to the following
equation:
R1= R2
V
OUT
V
REF
–1
A good value for R2 is 15k which sets the current in the
resistor divider chain to 1.00V/15k = 67μA.
V
FBP
is usually just tied to V
REF
= 1.00V, but V
FBP
can also
be tied to a divided down version of V
REF
or some other
voltage as long as the absolute maximum ratings for the
feedback pins are not exceeded (see Absolute Maximum
Ratings).
For inverting topologies, V
FBN
is tied to ground and V
FBP
is connected between R1 and R2. R2 is between V
FBP
and V
REF
and R1 is between V
FBP
and V
OUT
(see the Ap-
plications section for examples). In this case:
V
OUT
= V
REF
R1
R
2
Select values of R1 and R2 according to the following
equation:
R1=R2
V
OUT
V
REF
A good value for R2 is 15k, which sets the current in the
resistor divider chain to 1.00V/15k = 67μA.
Switching Frequency and Inductor Selection
The LT3471 switches at 1.2 MHz, allowing for small valued
inductors to be used. 4.7μH or 10μH will usually suf ce.
Choose an inductor that can handle at least 1.4A without
saturating, and ensure that the inductor has a low DCR
(copper-wire resistance) to minimize I
2
R power losses.
Note that in some applications, the current handling
requirements of the inductor can be lower, such as in the
SEPIC topology where each inductor only carries one half
of the total switch current. For better ef ciency, use similar
valued inductors with a larger volume. Many different sizes
and shapes are available from various manufacturers.
Choose a core material that has low losses at 1.2 MHz,
such as ferrite core.
Table 1. Inductor Manufacturers
Sumida (847) 956-0666 www.sumida.com
TDK (847) 803-6100 www.tdk.com
Murata (714) 852-2001 www.murata.com
current reaches this value, the SR latch is reset regardless
of the state of the comparator A2 (A4). Also not shown
in the Block Diagram is the thermal shutdown circuit. If
the temperature of the part exceeds approximately 160°C,
both latches are reset regardless of the state of compara-
tors A2 and A4. The current limit and thermal shutdown
circuits protect the power switch as well as the external
components connected to the LT3471.

LT3471EDD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2x 1.3A, 1.2MHz Boost/Inverter in 3 3
Lifecycle:
New from this manufacturer.
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