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DG401AK/883B

P1-P3P4-P5
SCOPE: IMPROVED, DUAL, HIGH-SPEED CHANNEL ANALOG SWITCHES
Device Type Generic Number
01 DG401A(x)/883B
02 DG403A(x)/883B
03 DG405A(x)/883B
Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows:
Outline Letter Mil-Std-1835
Case Outline Package Code
K GDIP1-T16 or CDIP2-T16 16 LEAD CERDIP J16
Z CQCC1-N20 20-Pin Ceramic LCC L20
Absolute Maximum Ratings
Voltage Referenced to V
-
V
+
to V
-
.............................................................................................................................. 44V
V
+
to GND ......................................................................................................................... 25V
V
L
................................................................................................... (GND-0.3V) to (V
+
+0.3V)
Digital Inputs, V
S
, V
D
1/ ........................................................................ .(V
-
-2V) to (V
+
+2V)
or 20mA whichever occurs first.
Continuous Current, Any terminal except S or D ........................................................... 30mA
Continuous Current, S or D ............................................................................................. 20mA
Peak Current, S or D (Pulsed at 1ms, 10% duty cycle max) ......................................... 100mA
Lead Temperature (soldering, 10 seconds) ........................................................................ +300°C
Storage Temperature ........................................................................................... -65°C to +150°C
Continuous Power Dissipation ............................................................................. T
A
=+70°C
16 lead CERDIP(derate 10.0mW/°C above +70°C) .................................................. 800mW
20 lead LCC (derate 9.1 mW/°C above +70°C) ........................................................ 727mW
Junction Temperature T
J
....................................................................................…. +150°C
Thermal Resistance, Junction to Case, ΘJC:
Case Outline 16 lead CERDIP................................................................…. 50°C/W
Case Outline 20 lead LCC .....................................................................…. 20°C/W
Thermal Resistance, Junction to Ambient, ΘJA:
Case Outline 16 lead CERDIP................................................................... 100°C/W
Case Outline 20 lead LCC ......................................................................... 110°C/W
Recommended Operating Conditions
Ambient Operating Range (T
A
) ....................................................……...... -55°C to +125°C
Positive Supply Voltage (V
+
) ..............................................................................……... +15V
Negative Supply Voltage (V
-
) ..............................................................................……... -15V
V
INL
(max) ............................................................................................................……... 0.8V
V
INH
(min) ...........................................................................................................…….... 2.4V
Logic Supply Voltage (V
L
) ...................................................................................…….. +5V
Low Charge Injection .........................................................................................……... 15pC
Crosstalk (channel-to-channel) 2/ .........................................................................…….. 90dB
1/ Signals on S
X
, D
X
or IN
X
exceeding V
+
or V
-
are clamped by internal diodes. Limit forward current to
maximum current ratings.
2/ Crosstalk performance is improved with case outline for 20LCC.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
---------------------------- Electrical Characteristics of DG401/403/405A /883B 19-0079 Rev. C
Page 2 of 7
TABLE 1. ELECTRICAL TESTS
TEST Symbol
CONDITIONS
-55 °C <=T
A
<= +125°C
V
+
=+15V, V
-
=-15V, GND=0V
V
INH
=2.4V, V
INL
=0.8V, V
L
=5V
Unless otherwise specified
Group A
Subgroup
Device
type
Limits
Min
3/
Limits
Max
3/
Units
SWITCH
Analog-Signal
Range
V
ANALOG
4/
1,2,3 All
-15 15 V
Drain-Source ON
Resistance
r
DS(ON)
V
+
=+13.5V, V
-
=-13.5V,
I
S
=-10mA, V
D
=±10V, V
INH
=2.4V,
V
INL
=0.8V
1
2,3
All
30
45
Ω
Drain-Source
ON
Resistance
Matching
between
Channels 5/
∆
r
DS
(ON)
V
+
=+15V, V
-
=-15V,
I
S
=-10mA, V
D
=±10V
1
2,3
All
2.0
3.0
Ω
On-Resistance
Flatness 5/
r
FLAT(ON)
V
+
=+15V, V
-
=-15V,
I
S
=-10mA, V
D
=±5V, 0V
1
2,3
All
3.0
6.0
Ω
Source-OFF
Leakage Current
I
S(OFF)
V
+
=+16.5V, V
-
=-16.5V,
V
D
=±15.5V, V
S
=±15.5V
1
2
All
-0.25
-10
0.25
10
nA
Drain-OFF
Leakage Current
I
D(OFF)
V
+
=+16.5V, V
-
=-16.5V,
V
D
=±15.5V, V
S
=±15.5V
1
2,3
All
-0.25
-10
0.25
10
nA
Drain-ON Leakage
Current
I
D(ON)
or
I
S(ON)
V
+
=+16.5V, V
-
=-16.5V,
V
D
=±15.5V, V
S
=±15.5V
1
2,3
All
-0.4
-20
0.4
20
nA
INPUT
Input
Current/Voltage
High
I
INH
V
IN
= 2.4V, all others = 0.8V 1,2,3
All
-1.0 1.0
µA
Input
Current/Voltage
Low
I
INL
V
IN
= 0.8V, all others = 2.4V 1,2,3
All
-1.0 1.0
µA
SUPPLY
Power-Supply
Range
±4.5 ±20
V
Positive Supply
Current
I+ All channels on or off,
V
+
=+16.5V, V
-
=-16.5V,
V
IN
=0V or 5V
1
2,3
All
-1.0
-5.0
1.0
5.0
µA
Negative Supply
Current
I- All channels on or off,
V
+
=+16.5V, V
-
=-16.5V,
V
IN
=0V or 5V
1
2,3
All
-1.0
-5.0
1.0
5.0
µA
Logic Supply
Current
I
L
All channels on or off,
V
+
=+16.5V, V
-
=-16.5V,
V
IN
=0V or 5V
1
2,3
All
-1.0
-5.0
1.0
5.0
µA
Ground Current I
GND
All channels on or off,
V
+
=+16.5V, V
-
=-16.5V,
V
IN
=0V or 5V
1
2,3
All
-1.0
-5.0
1.0
5.0
µA
---------------------------- Electrical Characteristics of DG401/403/405A /883B 19-0079 Rev. C
Page 3 of 7
TEST Symbol
CONDITIONS
-55 °C <=T
A
<= +125°C
V
+
=+15V, V
-
=-15V, GND=0V
V
INH
=2.4V, V
INL
=0.8V, V
L
=5V
Unless otherwise specified
Group A
Subgroup
Device
type
Limits
Min
3/
Limits
Max
3/
Units
DYNAMIC
Turn-On Time
t
ON
Figure 2 9
All
150 ns
Turn-Off Time
t
OFF
Figure 2 9
All
100 ns
Break-Before-
Make Delay 4/
t
D
DG403 only, Figure 3 9
02
10 ns
Charge Injection 4/ Q
C
L
=1.0nF, V
GEN
=0V, R
GEN
=0Ω
Figure 4
9
All
15 pC
NOTE 3: This data sheet uses the algebraic convention, where the most negative value is a minimum and the most
positive value is a maximum.
NOTE 4: Guaranteed by design.
NOTE 5: ∆
r
ON
=∆
r
ON
(max)-∆
r
ON
(min). On-resistance match between channels and flatness are guaranteed only
with specified voltages. Flatness is defined as the difference between the maximum and minimum value
of on-resistance as measured at the extremes of the specified analog signal range.
FIGURE 1: SWITCHING TIME TEST CIRCUIT: See Commercial Data Sheet
FIGURE 2: SWITCHING TIME TEST CIRCUIT: See Commercial Data Sheet
FIGURE 3: BREAK-BEFORE-MAKE INTERVAL: See Commercial Data Sheet
FIGURE 4: CHARGE INJECTION: See Commercial Data Sheet
ORDERING INFORMATION:
DG401AK/883B 16 CDIP DG403AZ/883B 20 LCC
DG401AZ/883B 20 LCC DG405AK/883B 16 CDIP
DG403AK/883B 16 CDIP DG405AZ/883B 20 LCC
TRUTH TABLES:
DG401 DG401 DG403 DG403 DG403 DG405 DG405
LOGIC SWITCH LOGIC SWITCHES
1, 2
SWITCHES
3,4
LOGIC SWITCH
0 OFF 0 OFF ON 0 OFF
1 ON 1 ON OFF 1 ON
---------------------------- Electrical Characteristics of DG401/403/405A /883B 19-0079 Rev. C
Page 4 of 7
P1-P3P4-P5

DG401AK/883B

Mfr. #:
Buy DG401AK/883B
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs Dual High-Speed SPST CMOS Normally Open
Lifecycle:
New from this manufacturer.
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