ISL9021AIRUMZ-T

ISL9021A
10
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in the quality certifications found at www.intersil.com/design/quality
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without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FN7845.3
December 20, 2012
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About Intersil
Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management
semiconductors. The company's products address some of the fastest growing markets within the industrial and infrastructure,
personal computing and high-end consumer markets. For more information about Intersil or to find out how to become a member of
our winning team, visit our website and career page at www.intersil.com
.
For a complete listing of Applications, Related Documentation and Related Parts, please see the respective product information page.
Also, please check the product information page to ensure that you have the most updated datasheet: ISL9021A
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Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE REVISION CHANGE
December 17, 2012 FN7845.3 Added evaluation boards and ISL9021AIIUZ-T to “Ordering Information” on page 3.
December 2, 2011 FN7845.2 Changed CSP package dimension from “2mmx2mm” to “0.975mmx1.155mm” on page 1 to page 3.
October 7, 2011 FN7845.1 Updated “Ordering Information” on page 3 by adding ISL9021AIRUYZ-T and ISL9021AIRUYZ-T7A parts. Made
corrections to part markings and added -T7A parts.
May 27, 2011 FN7845.0 Initial Release
ISL9021A
11
FN7845.3
December 20, 2012
Package Outline Drawing
L6.1.6x1.6
6 LEAD ULTRA THIN DUAL FLAT NO-LEAD COL PLASTIC PACKAGE (UTDFN COL)
Rev 1, 11/07
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
TOP VIEW
BOTTOM VIEW
SIDE VIEW
located within the zone indicated. The pin #1 identifier may be
Unless otherwise specified, tolerance : Decimal ± 0.05
Tiebar shown (if present) is a non-functional feature.
The configuration of the pin #1 identifier is optional, but must be
between 0.15mm and 0.30mm from the terminal tip.
Dimension b applies to the metallized terminal and is measured
Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
6.
either a mold or mark feature.
3.
5.
4.
2.
Dimensions are in millimeters.1.
NOTES:
1.60
5X 0 . 40 ± 0 . 1
0.15
( 1 . 4 )
(4X)
( 6X 0 . 25 )
( 1X 0 .70 )
( 4X 0 . 5 )
0 . 55 MAX
BASE PLANE
C
SEATING PLANE
0.08
C
0.10
C
0.25 +0.05 / -0.07
SEE DETAIL "X"
0.10
4
CAMB
INDEX AREA
6
PIN 1
1.60
A
B
PIN #1 INDEX AREA
0.50
2X 1.00
4X
6
( 5X 0 . 60 )
0 . 00 MIN.
0 . 05 MAX.
C
0 . 2 REF
4
3
6
1
1X 0.5 ±0.1
ISL9021A
12
FN7845.3
December 20, 2012
Wafer Level Chip Scale Package
(WLCSP 0.4mm Ball Pitch)
SIDE VIEW
TOP VIEW
BOTTOM VIEW
PIN 1
E
D
A2
b
A1
e ( E1 )
SE
e ( D1 )
2
b
AB
SD
A
1
W2x2.4
2x2 ARRAY 4 BALL WAFER LEVEL CHIP SCALE PACKAGE
SYMBOL MILLIMETERS
A 0.44 Min, 0.495 Nom, 0.55 Max
A1 0.190 ±0.030
A2 0.305 ±0.025
b 0.270 ±0.030
D 1.155 ±0.020
D1 0.400 BASIC
E 0.975 ±0.020
E1 0.400 BASIC
e 0.400 BASIC
SD 0.200 BASIC
SE 0.00 BASIC
NUMBER OF BUMPS: 4
Rev. 2 6/08
NOTES:
1. All dimensions are in millimeters.

ISL9021AIRUMZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
LDO Voltage Regulators LDO W/LW NOISE HI PSRR LW IQ 1 6 X 1 6
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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