TEA1713T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 9 February 2011 7 of 47
NXP Semiconductors
TEA1713T
Resonant power supply control IC with PFC
• Boost charge state
The PFC controller is switching; the HBC controller is off. The current from the high
voltage start-up source is large enough to supply SUPIC (current consumption <
I
ch(nom)(SUPIC)
).
• Operational supply state
Both the PFC and HBC controllers are switching. Current consumption is I
oper(SUPIC)
.
When the HBC controller is enabled, the switching frequency will be high initially and
the current consumption of the HBC MOSFET drivers will be dominant. The stored
energy in C
SUPIC
will supply the initial SUPIC current before the SUPIC supply source
takes over.
Pin SUPIC has a low short-circuit detection voltage (V
scp(SUPIC)
; typ. 0.65 V). The current
dissipated in the HV start-up source is limited while V
SUPIC
< V
scp(SUPIC)
(see
Section 7.2.4
).
7.2.2 Regulated supply (pin SUPREG)
The voltage range on pin SUPIC exceeds that of the gate voltages of the external
MOSFETs. For this reason, the TEA1713 contains an integrated series stabilizer. The
series stabilizer creates an accurate regulated voltage (V
reg(SUPREG)
; typ. 10.9 V) at the
buffer capacitor C
SUPREG
. This stabilized voltage is used to:
• supply the internal PFC driver
• supply the internal low-side HBC driver
• supply the internal high-side driver via external components
• as a reference voltage for optional external circuits
The SUPREG series stabilizer is enabled after C
SUPIC
has been fully charged. This
ensures that any optional external circuitry connected to SUPREG will not dissipate any of
the start-up current.
To ensure that the external MOSFETs receive sufficient gate drive current, the voltage on
SUPREG must reach V
start(SUPREG)
(and the voltage on SUPIC must reach the start level)
before the IC starts operating.
SUPREG is provided with undervoltage protection (UVP-SUPREG; see Section 7.9
).
When V
SUPREG
falls below V
uvp(SUPREG)
(typ. 10.3 V), two events will be triggered:
• The IC will stop operating to prevent unreliable switching because the gate driver
voltage is too low. The PFC controller will stop switching immediately, but the HBC
controller will continue until the low-side stroke is active.
• The maximum current from the internal SUPREG series stabilizer is reduced to
I
ch(red)(SUPREG)
(typ. 5.4 mA). This will reduce the dissipation in the series stabilizer in
the event of an overload at SUPREG while SUPIC is supplied from an external DC
source.
7.2.3 High-side driver floating supply (pin SUPHS)
The high-side driver is supplied by an external bootstrap buffer capacitor, C
SUPHS
. The
bootstrap capacitor is connected between the high-side reference pin HB and the
high-side driver supply input pin SUPHS. C
SUPHS
is charged from pin SUPREG via an
