ISL97516
6
FN9261.6
March 28, 2014
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During the second cycle, the power FET turns off and the
Schottky diode is forward biased, (Figure 13). The energy
stored in the inductor is pumped to the output supplying
output current and charging the output capacitor. The Schottky
diode side of the inductor is clamp to a Schottky diode above
the output voltage. So the voltage drop across the inductor is
V
IN
- V
OUT
. The change in inductor current during the second
cycle is:
For stable operation, the same amount of energy stored in the
inductor must be taken out. The change in inductor current
during the two cycles must be the same.
FIGURE 11. BOOST CONVERTER
FIGURE 12. BOOST CONVERTER - CYCLE 1, POWER SWITCH
CLOSED
FIGURE 13. BOOST CONVERTER - CYCLE 2, POWER SWITCH OPEN
Output Voltage
An external feedback resistor divider is required to divide the
output voltage down to the nominal 1.294V reference voltage.
The current drawn by the resistor network should be limited to
maintain the overall converter efficiency. The maximum value
of the resistor network is limited by the feedback input bias
current and the potential for noise being coupled into the
feedback pin. A resistor network less than 100k is
recommended. The boost converter output voltage is
determined by the relationship in Equation 4:
The nominal VFB voltage is 1.294V.
Inductor Selection
The inductor selection determines the output ripple voltage,
transient response, output current capability, and efficiency. Its
selection depends on the input voltage, output voltage,
switching frequency, and maximum output current. For most
applications, the inductance should be in the range of 2µH to
33µH. The inductor maximum DC current specification must
be greater than the peak inductor current required by the
regulator. The peak inductor current can be calculated using
Equation 5:
Output Capacitor
Low ESR capacitors should be used to minimize the output
voltage ripple. Multilayer ceramic capacitors (X5R and X7R) are
preferred for the output capacitors because of their lower ESR
and small packages. Tantalum capacitors with higher ESR can
also be used. The output ripple can be calculated in Equation 6:
For noise sensitive applications, a 0.1µF placed in parallel with
the larger output capacitor is recommended to reduce the
switching noise coupled from the LX switching node.
I
L
t2
V
IN
V
OUT
–
L
------------------------------- -
=
t2
1D–
f
SW
-------------
=
(EQ. 2)
D
f
SW
----------
V
IN
L
---------
1D–
f
SW
-------------
V
IN
V
OUT
–
L
------------------------------- -
+ 0=
V
OUT
V
IN
----------------
1
1D–
-------------
=
(EQ. 3)
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C
OUT
C
IN
LD
V
IN
V
OUT
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C
OUT
C
IN
L
V
IN
V
OUT
t
1
V
O
I
L
I
L1
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C
OUT
C
IN
LD
V
IN
V
OUT
T
2
V
O
I
L2
I
L
V
OUT
V
FB
1
R
1
R
2
-------
+
=
(EQ. 4)
I
LPEAK
I
OUT
V
OUT
V
IN
------------------------------------
12
V
IN
V
OUT
V
IN
–
LV
OUT
FREQ
---------------------------------------------------- -
+=
(EQ. 5)
V
O
I
OUT
D
f
SW
C
O
-------------------------
I
OUT
ESR+=
(EQ. 6)
