HUF75925D3ST

©2004 Fairchild Semiconductor Corporation HUF75925D3ST Rev. C
HUF75925D3ST
11A, 200V, 0.275 Ohm, N-Channel,
UltraFET® Power MOSFET
Packaging
Symbol
Features
Ultra Low On-Resistance
-r
DS(ON)
= 0.275Ω, V
GS
= 10V
Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.fairchildsemi.com
Peak Current vs Pulse Width Curve
UIS Rating Curve
HUF75925D3ST
GATE
SOURCE
DRAIN
(FLANGE)
JEDEC TO-252AA
D
G
S
Ordering Information
PART NUMBER PACKAGE BRAND
HUF75925D3ST TO-252AA 75925D
NOTE: When ordering, use the entire part number.
Absolute Maximum Ratings T
C
= 25
o
C, Unless Otherwise Specified
HUF75925D3ST UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
200 V
Drain to Gate Voltage (R
GS
= 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
200 V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
±20 V
Drain Current
Continuous (T
C
= 25
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
C
= 100
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
11
8
Figure 4
A
A
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS Figures 6, 14, 15
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100
1.5
W
W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 175
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L
Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
NOTE:
1. T
J
= 25
o
C to 150
o
C.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Data Sheet August 2004
©2004 Fairchild Semiconductor Corporation HUF75925D3ST Rev. C
Electrical Specifications T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BV
DSS
I
D
= 250µA, V
GS
= 0V (Figure 11) 200 - - V
Zero Gate Voltage Drain Current I
DSS
V
DS
= 190V, V
GS
= 0V - - 1 µA
V
DS
= 180V, V
GS
= 0V, T
C
= 150
o
C - - 250 µA
Gate to Source Leakage Current I
GSS
V
GS
= ±20V - - ±100 nA
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage V
GS(TH)
V
GS
= V
DS
, I
D
= 250µA (Figure 10) 2 - 4 V
Drain to Source On Resistance r
DS(ON)
I
D
= 11A, V
GS
= 10V (Figure 9) - 0.220 0.275 ¾
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case R
θJC
TO-220 - - 1.5
o
C/W
Thermal Resistance Junction to
Ambient
R
θJA
TO-220 - - 62
o
C/W
TO-252 - - 100
o
C/W
SWITCHING SPECIFICATIONS (V
GS
= 10V)
Turn-On Time t
ON
V
DD
= 100V, I
D
= 11A
V
GS
= 10V,
R
GS
= 12
(Figures 18, 19)
- - 45 ns
Turn-On Delay Time t
d(ON)
-9-ns
Rise Time t
r
-21-ns
Turn-Off Delay Time t
d(OFF)
-60-ns
Fall Time t
f
- 27 - ns
Turn-Off Time t
OFF
- - 130 ns
GATE CHARGE SPECIFICATIONS
Total Gate Charge Q
g(TOT)
V
GS
= 0V to 20V V
DD
= 100V,
I
D
= 11A,
I
g(REF)
= 1.0mA
(Figures 13, 16, 17)
-5978nC
Gate Charge at 10V Q
g(10)
V
GS
= 0V to 10V - 32 42 nC
Threshold Gate Charge Q
g(TH)
V
GS
= 0V to 2V - 2.0 3.2 nC
Gate to Source Gate Charge Q
gs
-4.0-nC
Gate to Drain "Miller" Charge Q
gd
-11-nC
CAPACITANCE SPECIFICATIONS
Input Capacitance C
ISS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figure 12)
- 1030 - pF
Output Capacitance C
OSS
- 120 - pF
Reverse Transfer Capacitance C
RSS
-15-pF
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
SD
I
SD
= 11A - - 1.25 V
I
SD
= 5A - - 1.00 V
Reverse Recovery Time t
rr
I
SD
= 11A, dI
SD
/dt = 100A/µs - - 190 ns
Reverse Recovered Charge Q
RR
I
SD
= 11A, dI
SD
/dt = 100A/µs - - 940 nC
HUF75925D3ST
©2004 Fairchild Semiconductor Corporation HUF75925D3ST Rev. C
Typical Performance Curves
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. PEAK CURRENT CAPABILITY
T
C
, CASE TEMPERATURE (
o
C)
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 175
0.2
0.4
0.6
0.8
1.0
1.2
125
150
0
3
6
9
12
25 50 75 100 125 150 175
I
D
, DRAIN CURRENT (A)
T
C
, CASE TEMPERATURE (
o
C)
V
GS
= 10V
0.1
1
2
10
-4
10
-3
10
-2
10
-1
10
0
10
1
0.01
10
-5
t, RECTANGULAR PULSE DURATION (s)
Z
θJC
, NORMALIZED
THERMAL IMPEDANCE
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
P
DM
t
1
t
2
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.01
0.02
10
100
200
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
-5
I
DM
, PEAK CURRENT (A)
t, PULSE WIDTH (s)
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
T
C
= 25
o
C
I = I
25
175 - T
C
150
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
V
GS
= 10V
HUF75925D3ST

HUF75925D3ST

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
MOSFET N-CH 200V 11A DPAK
Lifecycle:
New from this manufacturer.
Delivery:
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